參數(shù)資料
型號: DS2423P/T&R
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Memory IC:Other
英文描述: SPECIALTY MEMORY CIRCUIT, PDSO6
封裝: 3.70 X 4 MM, 1.50 MM HEIGHT, TSOC-6
文件頁數(shù): 6/25頁
文件大?。?/td> 581K
代理商: DS2423P/T&R
DS2423
14 of 25
HARDWARE CONFIGURATION Figure 8
Note: Depending on the 1-Wire communication speed and the bus load characteristics, the optimal pull-
up resistor (RPU) value will be in the 1.5kΩ to 5kΩ range.
1-WIRE BUS SYSTEM
The 1-Wire bus is a system which has a single bus master and one or more slaves. In all instances the
DS2423 is a slave device. The bus master is typically a microcontroller. The discussion of this bus
system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire
signaling (signal types and timing). A 1-Wire protocol defines bus transactions in terms of the bus state
during specific time slots that are initiated on the falling edge of sync pulses from the bus master.
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open-
drain or 3-state outputs. The 1-Wire port of the DS2423 is open drain with an internal circuit equivalent
to that shown in Figure 8. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At
regular speed the 1-Wire bus has a maximum data rate of 16.3kbits per second. The speed can be boosted
to 142kbits per second by activating the Overdrive mode. The 1-Wire bus requires a pullup resistor of
approximately 5k. The 1-Wire bus requires a pullup resistor range of 1.5k
Ω to 5kΩ, depending on the
bus load characteristics.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 16s (Overdrive speed) or more than 120s (regular speed), one or more devices on the bus
may be reset.
TRANSACTION SEQUENCE
The protocol for accessing the DS2423 via the 1-Wire port is as follows:
Initialization
ROM Function Command
Memory Function Command
Transaction/Data
RPU
DS2423
Not
Recommended
for
New
Design
相關(guān)PDF資料
PDF描述
DS2423P SPECIALTY MEMORY CIRCUIT, PDSO6
DS2423X SPECIALTY MEMORY CIRCUIT, UUC
DS2423 4K X 1 STANDARD SRAM, PDSO6
DS2422 1K X 1 STANDARD SRAM, PDSO6
DS2430AP 256 X 1 1-WIRE SERIAL EEPROM, PDSO6
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2423V 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Serial SRAM
DS2423X 功能描述:靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
DS243 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC
DS2430 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:256-Bit 1-Wire EEPROM
DS2430A 功能描述:電可擦除可編程只讀存儲器 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8