參數(shù)資料
型號： DS2181AQ/T&R
廠商： Maxim Integrated Products
文件頁數(shù)： 15/32頁
文件大?。?/td> 0K
描述： IC TXRX CEPT PRIMARY RATE 44PLCC
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 500
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 1/1
規(guī)程： CEPT
電源電壓： 4.5 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 44-PLCC（16.59x16.59）
包裝： 帶卷 (TR)
DS2181A
22 of 32
CECR: CRC4 ERROR COUNT REGISTER Figure 21
(MSB)
(LSB)
CRC7
CRC6
CRC5
CRC4
CRC3
CRC2
CRC1
CRC0
SYMBOL
POSITION
NAME AND DESCRIPTION
CRC7
BVCR.7
MSB of CRC4 error count.
CRC0
BVCR.0
LSB of CRC4 error count.
FECR: FRAME ERROR COUNT REGISTER Figure 22
(MSB)
(LSB)
FE7
FE6
FE5
FE4
FE3
FE2
FE1
FE0
SYMBOL
POSITION
NAME AND DESCRIPTION
FE7
FECR.7
MSB of frame error count.
FE0
FECR.0
LSB of frame error count.
ERROR LOGGING
The BVCR, CECR and FECR contain 8-bit binary up counters which increment on individual bipolar
violations, CRC4 code word errors (when CCR.2 = 1), and word errors in the frame alignment signal.
Each counter saturates at 255. Once saturated, each following error occurrence will generate an interrupt
(RIMR.0 = 1) until the register is reprogrammed to a value other than FF (hex). Presetting the registers
allows the user to establish specific error count thresholds; the counter will count up to saturation from
the preset value. The BVCR increments at all times (regardless of sync status), except when HDB3 code
words are received with CCR.4=1. CECR and FECR increments are disabled whenever resync is in
progress (RLOS high).
ALARM OUTPUTS
Alarm conditions are also reported real time at alarm outputs. These outputs can be used with off-chip
logic to complement the on-chip error reporting capability of the DS2181A. In the hardware mode, they
are the only alarm reporting means available.
RLOS
The RLOS output indicates the status of the receive synchronizer. When high, frame, CAS multiframe
and/or CRC4 multiframe synchronization is in progress. A high-low transition indicates resync is
complete. The RLOS bit (RSR.1) is a latched version of the RLOS output.
RRA
The remote alarm output transitions high when a remote alarm is detected. A high-low transition indicates
the alarm condition has been cleared. The alarm condition is defined as bit 3 of time slot 0 set for three
consecutive non-align frames. The alarm state is cleared when bit 3 has been clear for three consecutive
non-align frames. The RRA bit (RSR.7) is a latched version of the RRA Output.
RBV
RBV pulses high when the accused bit emerges at RSER. RBV will return low when RCLK goes low.
Bipolar violations are also logged in the BVCR. The RBV pin provides a pulse for every violation which
can be counted externally.
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參數(shù)描述
DS2182 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2182A 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:T1 Line Monitor
DS2182AQ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM， Other/Special/Miscellaneous
DS2182N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2182Q 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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