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參數(shù)資料
| 型號： | DS2172T |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Telecom IC:Other |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PQFP32 |
| 封裝： | TQFP-32 |
| 文件頁數(shù)： | 21/22頁 |
| 文件大?。?/td> | 174K |
| 代理商： | DS2172T |
DS2172
8 of 22
6.0 PATTERN CONTROL REGISTER
The Pattern Control Register (PCR) is used to configure the operating parameters of the DS2172 and to
control the patterns being generated and received. Also the PCR is used to control the pattern
synchronizer and the error and bit counters.
PCR: PATTERN CONTROL REGISTER (Address=06 Hex)
(MSB)
(LSB)
TL
QRSS
PS
LC
RL
SYNCE
RESYNC
LPBK
SYMBOL
POSITION
NAME AND DESCRIPTION
TL
PCR.7
Transmit Load. A low to high transition loads the pattern generator with
the contents of the Pattern Set Registers. PCR.7 is logically OR’ed with the
input pin TL. Must be cleared and set again for subsequent loads.
QRSS
PCR.6
Zero Suppression Select. Forces a 1 into the pattern whenever the next 14
bit positions are all 0s. Should only be set when using the QRSS pattern.
0 = Zero suppression disabled
1 = Zero suppression enabled
PS
PCR.5
Pattern Select.
0 = Repetitive Pattern
1 = Pseudorandom Pattern
LC
PCR.4
Latch Count Registers. A low to high transition latches the bit and error
counts into the user accessible registers BCR and BECR and clears the
internal register count. PCR.4 is logically OR’ed with input pin LC. Must
be cleared and set again for subsequent loads.
RL
PCR.3
Receive Data Load. A transition from low to high loads the previous
32 bits of data received at RDATA into the Pattern Receive Registers
(PRR). PCR.3 is logically OR’ed with input pin RL. Must be cleared and
set again for subsequent latches.
SYNCE
PCR.2
SYNC Enable.
0 = auto resync is enabled.
1 = auto resync is disabled.
RESYNC
PCR.1
Initiate Manual Resync Process. A low to high transition will force the
DS2172 to resynchronize to the incoming pattern at RDATA. Must be
cleared and set again for a subsequent resync.
LPBK
PCR.0
Transmit/Receive Loopback Select. When enabled, the RDATA input is
disabled; TDATA continues to output data as normal. See Figure 1.
0 = loopback disabled
1 = loopback enabled
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS2172T/T&R | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述:IC TESTER BIT ERROR RATE 32-TQFP 制造商:Maxim Integrated Products 功能描述:Telecom ICs Bit Error Rate Tester (BERT) |
| DS2172T/T&R+ | 制造商:Maxim Integrated Products 功能描述:BERT 32P TQFP T&R LEAD FREE - Tape and Reel |
| DS2172T/T&R | 功能描述:電信集成電路 Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| DS2172T+ | 功能描述:電信集成電路 Bit Error Rate Tester (BERT) RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| DS2172T+T&R | 制造商:Maxim Integrated Products 功能描述:BIT ERROR RATE TESTER 32TQFP - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC TESTER BIT ERROR RATE 32-TQFP 制造商:Maxim Integrated Products 功能描述:Telecom ICs Bit Error Rate Tester (BERT) |
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