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參數(shù)資料
| 型號(hào)： | DS2165Q/T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 4/17頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PROC ADPCM 16/24/32K 28-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 類(lèi)型： | ADPCM 處理器 |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 帶卷 (TR) |
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DS2165Q
12 of 17
TIME SLOT RESTRICTIONS
Under certain conditions, the DS2165Q does contain some restrictions on the output time slots that are
available. These restrictions are covered in detail in a separate application note. No restrictions occur if
the DS2165Q is operated in the hardware mode.
INPUT TO OUTPUT DELAY
With all three compressions algorithms, the total delay, from the time the PCM data sample is captured
by the DS2165Q to the time it is output, is always less than 375
ms. The exact delay is determined by the
input and output time slots selected for each channel.
CHANNEL ASSOCIATED SIGNALING
The DS2165Q supports Channel Associated Signaling (CAS) through its ability to automatically change
from the 32kbps compression algorithm to the 24kbps algorithm. If the DS2165Q is configured to
perform the 32kbps algorithm, then in both the hardware and software mode it senses the frame sync
inputs (FSX and FSY) for a double-wide frame-sync pulse. Whenever the DS2165Q receives a double-
wide pulse, it automatically switches from the 32kbps algorithm to the 24kbps algorithm. Switching to
the 24kbps algorithm allows the user to insert signaling data into the LSB bit position of the ADPCM
output because this bit does not contain any useful speech information.
ON-THE-FLY ALGORITHM SELECTION
In the software mode, the user can switch between the three available algorithms on-the-fly. That is, the
DS2165Q does not need to be reset or stopped to make the change from one algorithm to another. The
DS2165Q reads the control register before it starts to process each PCM or ADPCM sample. If the user
wishes to switch algorithms, then the control register must be updated by the serial port before the first
input sample to be processed with the new algorithm arrives at either XIN or YIN. The PCM and
ACPCM outputs tri-state during register updates.
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| DS2167 | 功能描述:IC PROC ADPCM 16/24/32K 24-DIP RoHS:否 類(lèi)別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類(lèi)型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱(chēng):497-11050-6 |
| DS2167N | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Transcoder |
| DS2167Q | 功能描述:IC PROC ADPCM 16/24/32K 28-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類(lèi)型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱(chēng):497-11050-6 |
| DS2167QN | 功能描述:IC PROC ADPCM 16/24/32K 28-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類(lèi)型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱(chēng):497-11050-6 |
| DS2167QN/T&R | 制造商:Maxim Integrated Products 功能描述:IC PROC ADPCM 16/24/32K 28-PLCC |
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