參數(shù)資料
型號: DS2143QN/T&R
廠商: Maxim Integrated Products
文件頁數(shù): 2/44頁
文件大?。?/td> 0K
描述: IC CONTROLLER E1 5V LP 44-PLCC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 500
控制器類型: E1 控制器
接口: 并行/串行
電源電壓: 4.5 V ~ 5.5 V
電流 - 電源: 10mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 帶卷 (TR)
DS2143/DS2143Q
10 of 44
SYNC/RESYNC CRITERIA Table 2
FRAME OR
MULTIFRAME
LEVEL
SYNC CRITERIA
RESYNC CRITERIA
ITU
SPEC.
FAS
FAS present in frames N and N
+ 2, and FAS not present in
frame N + 1.
Three consecutive incorrect FAS
received.
Alternate (RCR1.2=1) the above
criteria is met or three consecutive
incorrect bit 2 of non-FAS received.
G.706
4.1.1
4.1.2
CRC4
Two valid MF alignment words
found within 8 ms.
915 or more CRC4 code words out
of 1000 received in error.
G.706
4.2
4.3.2
CAS
Valid MF alignment word
found and previous time slot 16
contains code other than all 0s.
Two consecutive MF alignment
words received in error.
G.732
5.2
RCR2: RECEIVE CONTROL REGISTER 2 (Address=11 Hex)
(MSB)
(LSB)
Sa8S
Sa7S
Sa6S
Sa5S
Sa4S
SCLKM
ESE
-
SYMBOL
POSITION
NAME AND DESCRIPTION
Sa8S
RCR2.7
Sa8 Bit Select. Set to 1 to report the Sa8 bit at the RLINK pin;
set to 0 to not report the Sa8 bit.
Sa7S
RCR2.6
Sa7 Bit Select. Set to 1 to report the Sa7 bit at the RLINK pin;
set to 0 to not report the Sa7 bit.
Sa6S
RCR2.5
Sa6 Bit Select. Set to 1 to report the Sa6 bit at the RLINK pin;
set to 0 to not report the Sa6 bit.
Sa5S
RCR2.4
Sa5 Bit Select. Set to 1 to report the Sa5 bit at the RLINK pin;
set to 0 to not report the Sa5 bit.
Sa4S
RCR2.3
Sa4 Bit Select. Set to 1 to report the Sa4 bit at the RLINK pin;
set to 0 to not report the Sa4 bit.
SCLKM
RCR2.2
SYSCLK Mode Select.
0 = if SYSCLK is 1.544 MHz.
1 = if SYSCLK is 2.048 MHz.
ESE
RCR2.1
Elastic Store Enable.
0 = elastic store is bypassed.
1 = elastic store is enabled.
-
RCR2.0
Not Assigned. Should be set to 0 when written to.
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