參數(shù)資料
型號(hào): DS1994L-F5
廠(chǎng)商: DALLAS SEMICONDUCTOR
元件分類(lèi): Memory IC:Other
英文描述: SPECIALTY MEMORY CIRCUIT, MRDB2
封裝: MICRO CAN
文件頁(yè)數(shù): 16/23頁(yè)
文件大?。?/td> 537K
代理商: DS1994L-F5
DS1992/DS1993/DS1994
23 of 23
102199
NOTES:
1. All voltages are referenced to ground.
2. VPUP = external pull–up voltage.
3. Input load is to ground.
4. An additional reset or communication sequence cannot begin until the reset high time has expired.
5. Read data setup time refers to the time the host must pull the 1–Wire bus low to read a bit. Data is
guaranteed to be valid within 1
s of this falling edge and will remain valid for 14 s minimum. (15
s total from falling edge on 1–Wire bus.)
6. Capacitance on the data line could be 800 pF when power is first applied. If a 5 k
resistor is used to
pull–up the data line to VCC, 5
s after power has been applied, the parasite capacitance will not affect
normal communications.
7. The reset low time (tRSTL) should be restricted to a maximum of 960
s, to allow interrupt signaling,
otherwise, it could mask or conceal interrupt pulses.
8. VIH is a function of the external pull–up resistor and the VCC power supply (DS1992, DS1993 only).
9. DS1994 only.
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DS1994-LFS 制造商: 功能描述: 制造商:undefined 功能描述:
DS1995 制造商:DALLAS 制造商全稱(chēng):Dallas Semiconductor 功能描述:16-kbit Memory iButton
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