參數(shù)資料
型號(hào)： DS1868-100
元件分類： 數(shù)字電位計(jì)
英文描述： Dual Digital Potentiometer Chip
中文描述： 雙數(shù)字電位器芯片
文件頁數(shù)： 11/14頁
文件大?。?/td> 276K
代理商： DS1868-100
DS1868
6 of 14
ABSOLUTE AND RELATIVE LINEARITY
Absolute linearity is defined as the difference between the actual measured output voltage and the
expected output voltage. Figure 5 presents the test circuit used to measure absolute linearity. Absolute
linearity is given in terms of a minimum increment or expected output when the wiper is moved one
position. In the case of the test circuit, a minimum increment (MI) or one LSB would equal 5/256 volts.
The equation for absolute linearity is given as follows:
(1)
ABSOLUTE LINEARITY
AL={VO(actual) - VO(expected)}/MI
Relative linearity is a measure of error between two adjacent wiper position points and is given in terms
of MI by equation (2).
(2)
RELATIVE LINEARITY
RL={VO(n+1) - VO(n)}/MI
Figure 6 is a plot of absolute linearity and relative linearity versus wiper position for the DS1868 at 25
°C.
The specification for absolute linearity of the DS1868 is
±0.75 MI typical. The specification for relative
linearity of the DS1868 is
±0.3 MI typical.
LINEARITY MEASUREMENT CONFIGURATION Figure 5
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