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參數(shù)資料
型號(hào)： DS1852B-00C+T&R
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 20/26頁(yè)
文件大?。?/td> 0K
描述： IC MONITOR TXRX OPTICAL 25-BGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
類型： 收發(fā)器
電源電壓： 2.7 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 25-TFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 25-BGA（5x5）
包裝： 帶卷 (TR)
DS1852
3 of 26
PIN DESCRIPTIONS
Name Ball Locations
Description
VCC
D2, D4, E3
Power-Supply Terminal. The DS1852 will support supply voltages
ranging from +2.7V to +5.5V.
GND
B3, C2, C4, D3
Ground Terminal
SDA
B5
2-Wire Serial Data. The serial data pin is for serial data transfer to and
from the DS1852. The pin is open drain and may be wire-OR’ed with
other open-drain or open-collector interfaces.
SCL
A5
2-Wire Serial Clock. The serial clock input is used to clock data into
the DS1852 on rising edges and clock data out on falling edges.
Bin
A3
Analog Input Pin (Bias Value). Input to A/D.
Pin
D1
Analog Input Pin (Power Level). Input to A/D.
Rin
A2
Analog Input Pin (Received Power). Input to A/D.
ASEL B2
Address Select Pin. If set to logic 0, the device address is A0h. If set to
logic 1, the value in Table 3, byte D0h determines the chip address
(factory default is A2h). For SFF-8472 compliance, this pin should be
connected high.
Din
C5
Digital Input Pin (TX Disable). Digital input for mirroring in memory
map.
RSin
B4
Digital Input Pin (Rate Select). Digital input for mirroring in memory
map.
Fin
E5
Digital Input Pin (TX Fault). Digital input for mirroring in memory
map.
Lin
A1
Digital Input Pin (LOS). Digital input for mirroring in memory map.
NC
A4, B1, C1, D5,
No Connect
E1, E2, E4, C3
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