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參數(shù)資料
| 型號(hào)： | DS17285S-5+T&R |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | XO, clock |
| 英文描述： | 3V/5V Real-Time Clock |
| 中文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO24 |
| 封裝： | SO-24 |
| 文件頁數(shù)： | 2/38頁 |
| 文件大?。?/td> | 411K |
| 代理商： | DS17285S-5+T&R |
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DS17285/DS17287
10 of 38
REGISTER B
MSB
LSB
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
SET
PIE
AIE
UIE
SQWE
DM
24/12
DSE
SET – When the SET bit is a 0, the update transfer functions normally by advancing the counts once per
second. When the SET bit is written to a 1, any update transfer is inhibited and the program can initialize
the time and calendar bytes without an update occurring in the midst of initializing. Read cycles can be
executed in a similar manner. SET is a read/write bit that is not modified by internal functions of the
DS17285/DS17287.
PIE – Periodic Interrupt Enable. The PIE bit is a read/write bit, which allows the periodic interrupt flag
(PF) bit in Register C to drive the IRQ pin low. When the PIE bit is set to 1, periodic interrupts are
generated by driving the IRQ pin low at a rate specified by the RS3–RS0 bits of Register A. A 0 in the
PIE bit blocks the IRQ output from being driven by a periodic interrupt, but the PF bit is still set at the
periodic rate. PIE is not modified by any internal DS17285/DS17287 functions.
AIE – Alarm Interrupt Enable. The AIE bit is a read/write bit which, when set to a 1, permits the alarm
flag (AF) bit in Register C to assert IRQ . An alarm interrupt occurs for each second that the three time
bytes equal the three alarm bytes, including a “don’t care” alarm code of binary 11XXXXXX. When the
AIE bit is set to 0, the AF bit does not initiate the IRQ signal. The internal functions of the
DS17285/DS17287 do not affect the AIE bit.
UIE – Update-Ended Interrupt Enable. The UIE bit is a read/write bit that enables the update-end flag
(UF) bit in Register C to assert IRQ . The SET bit going high clears the UIE bit.
SQWE – Square-Wave Enable. When the SQWE bit is set to a 1 and E32k = 0, a square-wave signal at
the frequency set by the rate-selection bits RS3 through RS0 is driven out on the SQW pin. When the
SQWE bit is set to 0and E32k = 0, the SQW pin is held low. SQWE is a read/write bit. SQWE is set to a
1 when VCC is powered up.
DM – Data Mode. The DM bit indicates whether time and calendar information is in binary or BCD
format. The DM bit is set by the program to the appropriate format and can be read as required. This bit is
not modified by internal functions. A 1 in DM signifies binary data while a 0 in DM specifies BCD data.
24/12 – 24/12-Control Bit. This bit establishes the format of the hours byte. A 1 indicates the 24-hour
mode and a 0 indicates the 12-hour mode. This bit is read/write.
DSE – Daylight Savings Enable. The DSE bit is a read/write bit that enables two special updates when
DSE is set to 1. On the first Sunday in April, the time increments from 1:59:59 AM to 3:00:00 AM. On
the last Sunday in October, when the time first reaches 1:59:59 AM, it changes to 1:00:00 AM. These
special updates do not occur when the DSE bit is a 0. This bit is not affected by internal functions.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS17285SN- | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Real-Time Clocks |
| DS17285SN3 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Real-Time Clocks |
| DS17285SN-3 | 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS17285SN-3+ | 功能描述:實(shí)時(shí)時(shí)鐘 3V/5V RTC K Multiplexed Kick-S RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS17285SN5 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Real-Time Clocks |
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