參數(shù)資料
型號(hào)： DS16EV5110ASQE/NOPB
廠商： National Semiconductor
文件頁(yè)數(shù)： 2/24頁(yè)
文件大?。?/td> 0K
描述： IC EQUALIZER VIDEO 3D+C 48LLP
產(chǎn)品培訓(xùn)模塊： Signal Conditioning Applications
標(biāo)準(zhǔn)包裝： 1
類型： 視頻均衡器
應(yīng)用： HD 顯示器，DVI/HDMI
安裝類型： 表面貼裝
封裝/外殼： 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-LLP（7x7）
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 1279 (CN2011-ZH PDF)
其它名稱： DS16EV5110ASQEDKR
SNLS301C – JULY 2008 – REVISED APRIL 2013
DS16EV5110A DEVICE DESCRIPTION
The DS16EV5110A video equalizer comprises three data channels, a clock channel, and a control interface
including a Systeml Management Bus (SMBus) port.
DATA CHANNELS
The DS16EV5110A provides three data channels. Each data channel consists of an equalizer stage, a limiting
amplifier, a DC offset correction block, and a TMDS driver as shown in Figure 3.
EQUALIZER BOOST CONTROL
The data channel equalizers support eight programmable levels of equalization boost. The state of the FEB pin
determines how the boost settings are controlled. If the FEB pin is held High, then the equalizer boost setting is
controlled by the Boost Set pins (BST_[0:2]) in accordance with Table 2. If this programming method is chosen,
then the boost setting selected on the Boost Set pins is applied to all three data channels. When the FEB pin is
held Low, the equalizer boost level is controlled through the SMBus. This programming method is accessed via
the appropriate SMBus registers (see Table 1). Using this approach, equalizer boost settings can be
programmed for each channel individually. FEB is internally pulled High (default setting); therefore if left
unconnected, the boost settings are controlled by the Boost Set pins (BST_[0:2]). The range of boost settings
provided enables the DS16EV5110A to address a wide range of transmission line path loss scenarios, enabling
support for a variety of data rates and formats.
Table 2. EQ Boost Control Table
Control Via SMBus
Control Via Pins
EQ Boost Setting at
BC_2, BC_1, BC_0
BST_2, BST_1,
825 MHz (dB)
(FEB = 0)
BST_0
(TYP)
(FEB = 1)
000
9
001
14
010
18
011
21
100
24
101
26
110
28
111
30
DEVICE STATE AND ENABLE CONTROL
The DS16EV5110A has an Enable feature which provides the ability to control device power consumption. This
feature can be controlled either via the Enable Pin (EN Pin) or via the Enable Control Bit which is accessed
through the SMBus port (see Table 1 and Table 3). If Enable is activated, the data channels and clock channel
are placed in the ACTIVE state and all device blocks function as described. The DS16EV5110A can also be
placed in STANDBY mode to save power. In this mode only the control interface including the SMBus port as
well as the clock channel signal detection circuit remain active.
Table 3. Enable and Device State Control
Register 07[0]
EN Pin
Register 03[3] (EN
Device State
(SMBus)
(CMOS)
Control)
(SMBus)
0 : Disable
1
X
ACTIVE
0 : Disable
0
X
STANDBY
1 : Enable
X
0
ACTIVE
1 : Enable
X
1
STANDBY
10
Copyright 2008–2013, Texas Instruments Incorporated
Product Folder Links: DS16EV5110A
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