參數(shù)資料
型號: DS1689SN
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Timer or RTC
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO28
封裝: 0.330 INCH, SOIC-28
文件頁數(shù): 14/36頁
文件大小: 594K
代理商: DS1689SN
DS1689/DS1693
21 of 36
EXTENDED CONTROL REGISTERS
Two extended control registers are provided to supply controls and status information for the extended
features offered by the DS1689/DS1693. These are designated as extended control registers A and B and
are located in register bank 1, locations 04AH and 04BH, respectively. The functions of the bits within
these registers are described as follows.
Extended Control Register 4A
MSB
LSB
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
VRT2
INCR
*
PAB
RF
WF
KF
*Reserved bits. These bits are reserved for future use by Dallas Semiconductor. They can be read and written, but have no effect on
operation.
Bit 7: VRT2. This status bit gives the condition of the auxiliary battery. It is set to a logic 1 condition
when the external lithium battery is connected to the VBAUX. If this bit is read as logic 0, the external
battery should be replaced.
Bit 6: INCR (Increment in Progress Status). This bit is set to 1 when an increment to the time/date
registers is in progress and the alarm checks are being made. INCR is set to 1 at 122
s before the update
cycle starts and is cleared to 0 at the end of each update cycle.
Bit 4: PAB (Power Active Bar Control). When this bit is 0, the
PWR pin is in the active-low state. The
user can write this bit to logic 1 or logic 0. If either [WF and WIE = 1] or [KF and KSE = 1], the PAB bit
is cleared to 0.
Bit 2: RF (RAM Clear Flag). This bit is set to logic 1 when a high-to-low transition occurs on the
RCLR
input if RCE = 1. The RF bit is cleared by writing it to logic 0. This bit can also be written to logic 1 to
force an interrupt condition.
Bit 1: WF (Wake-Up Alarm Flag). This bit is set to 1 when a wake-up alarm condition occurs or when
the user writes it to 1. WF is cleared by writing it to 0.
Bit 0: KF (Kickstart Flag). This bit is set to 1 when a kickstart condition occurs or when the user writes
it to 1. This bit is cleared by writing it to logic 0.
相關(guān)PDF資料
PDF描述
DS1689S 1 TIMER(S), REAL TIME CLOCK, PDSO28
DS1693 1 TIMER(S), REAL TIME CLOCK, PDMA28
DS1689 1 TIMER(S), REAL TIME CLOCK, PDIP28
DS1720S+T&R DIGITAL TEMP SENSOR-SERIAL, 9BIT(s), RECTANGULAR, SURFACE MOUNT
DS1720S+ DIGITAL TEMP SENSOR-SERIAL, 9BIT(s), RECTANGULAR, SURFACE MOUNT
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