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    參數(shù)資料
    型號: DS1685Q-5
    廠商: DALLAS SEMICONDUCTOR
    元件分類: Timer or RTC
    英文描述: 1 TIMER(S), REAL TIME CLOCK, PQCC28
    封裝: PLASTIC, LCC-28
    文件頁數(shù): 39/39頁
    文件大?。?/td> 290K
    代理商: DS1685Q-5
    DS1685/DS1687
    9 of 39
    CONTROL REGISTERS
    The four control registers A, B, C, and D reside in both bank 0 and bank 1. These registers are accessible
    at all times, even during the update cycle.
    REGISTER A
    MSB
    LSB
    BIT 7
    BIT 6
    BIT 5
    BIT 4
    BIT 3
    BIT 2
    BIT 1
    BIT 0
    UIP
    DV2
    DV1
    DV0
    RS3
    RS2
    RS1
    RS0
    UIP - The Update In Progress (UIP) bit is a status flag that can be monitored. When the UIP bit is a one,
    the update transfer will soon occur. When UIP is a 0, the update transfer will not occur for at least 244
    s. The time, calendar, and alarm information in RAM is fully available for access when the UIP bit is 0.
    The UIP bit is read only. Writing the SET bit in Register B to a 1 inhibits any update transfer and clears
    the UIP status bit.
    DV2, DV1, DV0 - These bits are defined as follows:
    DV2 = Countdown Chain
    1 - resets countdown chain only if DV1=1
    0 - countdown chain enabled
    DV1 = Oscillator Enable
    0 - oscillator off
    1 - oscillator on
    DV0 = Bank Select
    0 - original bank
    A pattern of 01X is the only combination of bits that will turn the oscillator on and allow the RTC to keep
    time. A pattern of 11X will enable the oscillator but holds the countdown chain in reset. The next update
    will occur at 500 ms after a pattern of 01X is written to DV2, DV1, and DV0.
    RS3, RS2, RS1, RS0 - These four rate-selection bits select one of the 13 taps on the 15-stage divider or
    disable the divider output. The tap selected can be used to generate an output square wave (SQW pin)
    and/or a periodic interrupt. The user can do one of the following
    Enable the interrupt with the PIE bit;
    Enable the SQW output pin with the SQWE or E32K bits;
    Enable both at the same time and the same rate; or
    Enable neither.
    Table 2 lists the periodic interrupt rates and the square wave frequencies that can be chosen with the RS
    bits.
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
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