- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1994 > DS1646-120+ (Maxim Integrated Products)IC RAM TIMEKEEP NV 120NS 32-EDIP PDF資料下載
參數(shù)資料
| 型號： | DS1646-120+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RAM TIMEKEEP NV 120NS 32-EDIP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 12 |
| 類型： | 時鐘/日歷 |
| 特點： | 閏年，NVSRAM |
| 存儲容量： | 128KB |
| 時間格式： | HH:MM:SS（24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 32-DIP 模塊（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 32-EDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1432 (CN2011-ZH PDF) |
DS1646/DS1646P
6 of 12
WRITING DATA TO RAM OR CLOCK
The DS1646 is in the write mode whenever WE and CE are in their active state. The start of a write is
referenced to the latter occurring high to low transition of WE and CE . The addresses must be held valid
throughout the cycle. CE or WE must return inactive for a minimum of tWR prior to the initiation of
another read or write cycle. Data in must be valid tDS prior to the end of write and remain valid for tDH
afterward. In a typical application, the OE signal will be high during a write cycle. However, OE can be
active provided that care is taken with the data bus to avoid bus contention. If OE is low prior to WE
transitioning low the data bus can become active with read data defined by the address inputs. A low
transition on WE will then disable the outputs tWEZ after WE goes active.
DATA RETENTION MODE
When VCC is within nominal limits (VCC > 4.5 volts) the DS1646 can be accessed as described above with
read or write cycles. However, when VCC is below the power-fail point VPF (point at which write
protection occurs) the internal clock registers and RAM are blocked from access. This is accomplished
internally by inhibiting access via the CE signal. At this time the power-fail output signal ( PFO ) will be
driven active low and will remain active until VCC returns to nominal levels. When VCC falls below the
level of the internal battery supply, power input is switched from the VCC pin to the internal battery and
clock activity, RAM, and clock data are maintained from the battery until VCC is returned to nominal
level.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS1647P-120 | IC RAM TIMEKEEP NV 120NS 34-PCM |
| DS1670S | IC CTRLR SYSTEM PORTABLE 20-SOIC |
| DS1672S-3/T&R | IC TIMEKEEPER 3V 32-BIT 8-SOIC |
| DS1673S-3 | IC CTRLR SYSTEM PORT 3V 20-SOIC |
| DS1677E | IC CTRLR SYSTEM PORT 20-TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1646-120+ | 功能描述:實時時鐘 NV Timekeeping RAM RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1646-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (Battery Based) |
| DS1646H-120 | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1646L-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (Battery Based) |
| DS1646L-120 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (Battery Based) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。