參數(shù)資料
型號: DS1644P-120
廠商: Maxim Integrated Products
文件頁數(shù): 7/14頁
文件大?。?/td> 0K
描述: IC RAM TIMEKEEP NV 120NS 34-PCM
標準包裝: 40
類型: 時鐘/日歷
特點: 閏年,NVSRAM
存儲容量: 32KB
時間格式: HH:MM:SS(24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: 并聯(lián)
電源電壓: 4.5 V ~ 5.5 V
電壓 - 電源,電池: 3V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 34-PowerCap? 模塊
供應(yīng)商設(shè)備封裝: 34-PowerCap 模塊
包裝: 管件
其它名稱: DS1644P120
DS1644/DS1644P
2 of 14
PIN DESCRIPTION
PIN
PDIP
PowerCap
NAME
FUNCTION
1
32
A14
2
30
A12
3
25
A7
4
24
A6
5
23
A5
6
22
A4
7
21
A3
8
20
A2
9
19
A1
10
18
A0
Address Input
11
16
DQ0
12
15
DQ1
13
14
DQ2
Data Input/Output
14
17
GND
Ground
15
13
DQ3
16
12
DQ4
17
11
DQ5
18
10
DQ6
19
9
DQ7
Data Input/Output
20
8
CE
Active Low Chip-Enable Input
21
28
A10
Address Input
22
7
OE
Active Low Output-Enable Input
23
29
A11
24
27
A9
25
26
A8
26
31
A13
Address Input
27
6
WE
Active-Low Write-Enable Input
28
5
VCC
Power-Supply Input
-
4
RST
Active-Low Reset Output, Open Drain. Requires a pull-up resistor for
proper operation.
-
1-3,33,34
NC
No Connection
-
X1, X2,
VBAT
Crystal Connection VBAT Battery Connection
DESCRIPTION
The DS1644 is a 32k x 8 nonvolatile static RAM with a full function real time clock, which are both
accessible in a byte-wide format. The nonvolatile timekeeping RAM is functionally equivalent to any
JEDEC standard 32k x 8 SRAM. The device can also be easily substituted for ROM, EPROM and
EEPROM, providing read/write nonvolatility and the addition of the real time clock function. The real
time clock information resides in the eight uppermost RAM locations. The RTC registers contain year,
month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the day of the
month and leap year are made automatically. The RTC clock registers are double-buffered to avoid access
of incorrect data that can occur during clock update cycles. The double-buffered system also prevents
time loss as the timekeeping countdown continues unabated by access to time register data. The DS1644
also contains its own power-fail circuitry, which deselects the device when the VCC supply is in an out-of-
tolerance condition. This feature prevents loss of data from unpredictable system operation brought on by
low VCC as errant access and update cycles are avoided.
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