參數(shù)資料
型號(hào)： DS1500YN
廠商： DALLAS SEMICONDUCTOR
元件分類： Timer or RTC
英文描述： REAL TIME CLOCK, PDIP32
封裝： DIP-32
文件頁(yè)數(shù)： 21/25頁(yè)
文件大?。?/td> 214K
代理商： DS1500YN
DS1500/DS1510
5 of 25
AUXILIARY BATTERY
The VBAUX input is provided to supply power from an auxiliary battery for the DS1500/DS1510 kickstart
and SQW output features in the absence of VCCI. This power source must be available in order to use
these auxiliary features when no VCCI is applied to the device.
This auxiliary battery may be used as the primary backup power source for maintaining the clock/calendar
and external SRAM. This occurs if the VBAT pin is at a lower voltage than VBAUX. If the DS1500/DS1510
is to be backed-up using a single battery with the auxiliary features enabled, then VBAUX should be used
and connected to VBAT. If VBAUX is not to be used, it should be grounded.
POWER ON RESET
A temperature compensated comparator circuit monitors the level of V
CCI. When VCCI falls to the power
fail trip point, the RST signal (open drain) is pulled low. When V
CCI returns to nominal levels, the RST
signal continues to be pulled low for a period of 40 ms to 200 ms. The power on reset function is
independent of the RTC oscillator and thus is operational whether or not the oscillator is enabled.
CLOCK OSCILLATOR CONTROL
The Clock oscillator may be stopped at any time. To increase the shelf life of a backup lithium battery
source, the oscillator can be turned off to minimize current drain from the battery. The EOSC bit is used
to control state of the oscillator, and must be set to a "0" for the oscillator to function.
READING THE CLOCK
When reading the clock and calendar data, it is recommended to halt updates to the external set of double
buffered RTC registers. This puts the external registers into a static state allowing data to be read without
register values changing during the read process. Normal updates to the internal registers continue while
in this state. External updates are halted when a ”0” is written into the read (TE) bit of Control register B
(0 Fh). As long as a “0” remains in the Control register B (TE) bit, updating is halted. After a halt is
issued, the registers reflect the RTC count (day, date, and time) that was current at the moment the halt
command was issued. Normal updates to the external set of registers will resume within 1 second after
the (TE) bit is set to a “1”.
SETTING THE CLOCK
It is also recommended to halt updates to the external set of double buffered RTC registers when writing
to the clock. The (TE) bit should be used as described above before loading the RTC registers with the
desired RTC count (day, date, and time) in 24-hour BCD format. Setting the (TE) bit to a “1” will
transfer the values written to the internal RTC registers and allows normal operation to resume.
CLOCK ACCURACY
A standard 32.768 kHz quartz crystal should be directly connected to the DS1500 X1 and X2 oscillator
pins. The crystal selected for use should have a specified load capacitance (CL) of either 6 pF or 12.5 pF,
and the Crystal Select (CS) bit set accordingly. For more information on crystal selection and crystal
layout considerations, please consult Application Note 58, “Crystal Considerations with Dallas Real Time
Clocks.” The DS1500 can also be driven by an external 32.768 kHz oscillator. In order to achieve low
power operation when using an external oscillator, it may be necessary to connect the X1 pin to the
external oscillator signal through a series connection consisting of a resistor and a capacitor. A typical
configuration consists of a 1.0Meg resistor in series with a 100 pF ceramic capacitor. When using an
external oscillator the X2 pin must be left open. Accuracy of DS1510 is better than ±1 min./month at
25
°C.
相關(guān)PDF資料
PDF描述
DS1501WN 1 TIMER(S), REAL TIME CLOCK, PDIP28
DS1501YN 1 TIMER(S), REAL TIME CLOCK, PDIP28
DS1501WEN 1 TIMER(S), REAL TIME CLOCK, PDSO28
DS1501WSN 1 TIMER(S), REAL TIME CLOCK, PDSO28
DS1501YEN 1 TIMER(S), REAL TIME CLOCK, PDSO28
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