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參數(shù)資料
| 型號： | DS1482S+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/7頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LEVEL SHIFT 1-WIRE 16-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 類型： | 線路驅(qū)動器，發(fā)射器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 管件 |
DS1482
7 of 7
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUT PIN RXD
Output-Low Voltage
VOL
100A load
0.4
V
Output-High Voltage
VOH
-100A load
VCCQ - 0.5V
V
Output Rise Time
(50pF Load)
tR
0.1 x VCCQ to 0.9 x VCCQ
50
ns
Output Fall Time
(50pF Load)
tF
0.9 x VCCQ to 0.1 x VCCQ
50
ns
Delay I/O to RXD
(50pF Load)
tIR
See Figure 6 (Note 2)
100
ns
OUTPUT PIN PCTLZ
Output-Low Voltage
VOL
100A load
0.4
V
Output-High Voltage
VOH
-100A load
VCC - 0.5V
V
Output Rise Time
(50pF Load)
tR
0.1 x VCC to 0.9 x VCC
50
ns
Output Fall Time
(50pF Load)
tF
0.9 x VCC to 0.1 x VCC
50
ns
Delay SPU to PCTLZ
(50pF Load)
tSP
See Figure 7 (Note 4)
100
ns
OUTPUT PIN DONE
Output-Low Voltage
VOL
100A load
0.4
V
Output-High Voltage
VOH
-100A load
VCCQ - 0.5V
V
Output Rise Time
(50pF Load)
tR
0.1 x VCCQ to 0.9 x VCCQ
50
ns
Output Fall Time
(50pF Load)
tF
0.9 x VCCQ to 0.1 x VCCQ
50
ns
Delay I/O to DONE
(50pF Load)
tCF
START at VCCQ (Note 5)
128
500
s
Delay START to
DONE (50pF Load)
tSD
See Figure 8
100
ns
Note 1:
The input pins have a weak pulldown.
Note 2:
For OD read- or write-1 time slots, TXD should be pulsed high for 1.28s. The window for
sampling RXD begins 1.8s after TXD has turned high and ends 2.05s after TXD has turned
high. RXD must be sampled inside this window. Correct sampling can be achieved with the
particular recommended microcontroller Hitachi SH7622 if the peripheral module operating
frequency P
Φ is higher or equal to 22MHz.
Note 3:
Measured either with VCC on the pin and TXD low or with 0V on the pin and TXD high. This
parameter is guaranteed by design, and is not production tested.
Note 4:
The PCTLZ signal is gated by TXD. The PCTLZ output is only low if TXD is low.
Note 5:
Characteristic of the glitch-eating filter on the output of the load-sensing comparator, i.e., an
event where the downstream 1-Wire slave device is sinking high current, ceases sinking the
current for less than this amount of time, and resumes sinking the current does not generate
high level on DONE; DONE goes high this amount of time after the downstream 1-Wire slave
device has ceased sinking high current.
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| DS1482S/R | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:1-Wire Level Shifter and Line Driver with Load Sensor |
| DS1482S/T | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:1-Wire Level Shifter and Line Driver with Load Sensor |
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| DS1482S+ | 功能描述:IC LEVEL SHIFT 1-WIRE 16-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:25 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-PDIP 包裝:管件 |
| DS1482S+T&R | 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
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