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參數(shù)資料
| 型號： | DS12CR887-5+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 13/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC W/RAM 128 BYTE 24-EDIP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 14 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，閏年，NVSRAM，方波輸出，涓流充電器 |
| 存儲容量： | 114B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 24-DIP 模塊（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 24-EDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1433 (CN2011-ZH PDF) |
DS12R885/DS12CR887/DS12R887
RTCs with Constant-Voltage Trickle Charger
20
Maxim Integrated
Update Cycle
The DS12R885 executes an update cycle once per
second regardless of the SET bit in Register B. When
the SET bit in Register B is set to 1, the user copy of the
double-buffered time, calendar, and alarm bytes is
frozen and does not update as the time increments.
However, the time countdown chain continues to
update the internal copy of the buffer. This feature
allows time to maintain accuracy independent of read-
ing or writing the time, calendar, and alarm buffers, and
also guarantees that time and calendar information is
consistent. The update cycle also compares each
alarm byte with the corresponding time byte and issues
an alarm if a match or if a don’t-care code is present in
all three positions.
There are three methods that can handle RTC access
that avoid any possibility of accessing inconsistent time
and calendar data. The first method uses the update-
ended interrupt. If enabled, an interrupt occurs after
every update cycle that indicates over 999ms is avail-
able to read valid time and date information. If this
interrupt is used, the IRQF bit in Register C should be
cleared before leaving the interrupt routine.
A second method uses the update-in-progress bit (UIP)
in Register A to determine if the update cycle is in
progress. The UIP bit pulses once per second. After
the UIP bit goes high, the update transfer occurs 244s
later. If a low is read on the UIP bit, the user has at least
244s before the time/calendar data is changed.
Therefore, the user should avoid interrupt service rou-
tines that would cause the time needed to read valid
time/calendar data to exceed 244s.
The third method uses a periodic interrupt to determine if
an update cycle is in progress. The UIP bit in Register A
is set high between the setting of the PF bit in Register C
(Figure 3). Periodic interrupts that occur at a rate greater
than tBUC allow valid time and date information to be
reached at each occurrence of the periodic interrupt.
The reads should be complete within one (tPI/2 + tBUC)
to ensure that data is not read during the update cycle.
SELECT BITS
REGISTER A
RS3
RS2
RS1
RS0
tPI PERIODIC
INTERRUPT
RATE
SQW OUTPUT
FREQUENCY
0
None
0
1
3.90625ms
256Hz
0
1
0
7.8125ms
128Hz
0
1
122.070s
8.192kHz
0
1
0
244.141s
4.096kHz
0
1
0
1
488.281s
2.048kHz
0
1
0
976.5625s
1.024kHz
0
1
1.953125ms
512Hz
1
0
3.90625ms
256Hz
1
0
1
7.8125ms
128Hz
1
0
1
0
15.625ms
64Hz
1
0
1
31.25ms
32Hz
1
0
62.5ms
16Hz
1
0
1
125ms
8Hz
1
0
250ms
4Hz
1
500ms
2Hz
Table 3. Periodic Interrupt Rate and
Square-Wave Output Frequency
UIP
UF
PF
tBUC = DELAY TIME BEFORE UPDATE
CYCLE = 244
μs
1 SECOND
tPI
tPI/2
tBUC
Figure 3. UIP and Periodic Interrupt Timing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS12CR887-5+ | 功能描述:實時時鐘 RTC w/Constant V Trickle Charger RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS12R885-33 | 制造商:Maxim Integrated Products 功能描述:REAL TIME CLOCK MULTIPLEXED 114BYTE - Bulk |
| DS12R885-5 | 制造商:Maxim Integrated Products 功能描述:REAL TIME CLOCK MULTIPLEXED 114BYTE - Bulk |
| DS12R885S-33 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS12R885S-33/T&R | 制造商:Maxim Integrated Products 功能描述:REAL TIME CLOCK MULTIPLEXED 114BYTE 24SOIC W - Tape and Reel |
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