PART NUMBER DELAY TABLE (tPLH, t
參數(shù)資料
型號: DS1135Z-8+
廠商: Maxim Integrated Products
文件頁數(shù): 2/7頁
文件大小: 0K
描述: IC DELAY LINE 8NS 8-SOIC
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 100
功能: 多個,不可編程
延遲到第一抽頭: 8ns
可用的總延遲: 8ns
獨立延遲數(shù): 3
電源電壓: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 管件
產(chǎn)品目錄頁面: 1436 (CN2011-ZH PDF)
DS1135
2 of 7
LOGIC DIAGRAM Figure 1
PART NUMBER DELAY TABLE (tPLH, tPHL) Table 1
PART NUMBER
DELAY PER
OUTPUT
(ns)
INITIAL
TOLERANCE
(Note 1)
TOLERANCE OVER
TEMP AND VOLTAGE
(Note 2)
0°C to +70°C
-40°C to +85°C
DS1135Z-6+
6/6/6
±
1.0ns
±
1.0ns
±
1.5ns
DS1135Z-8+
8/8/8
±
1.0ns
±
1.0ns
±
1.5ns
DS1135Z-10+
10/10/10
±
1.0ns
±
1.0ns
±
1.5ns
DS1135Z-12+
12/12/12
±
1.0ns
±
1.0ns
±
1.5ns
DS1135Z-15+
15/15/15
±
1.0ns
±
1.5ns
±
2ns
DS1135Z-20+
20/20/20
±
1.0ns
±
1.5ns
±
2ns
DS1135Z-25+
25/25/25
±
1.5ns
±
1.5ns
±
2ns
DS1135Z-30+
30/30/30
±
1.5ns
±
1.5ns
±
2ns
NOTES:
1. Nominal conditions are +25°C and VCC =+5.0V.
2. Voltage range of 4.75V to 5.25V.
3. Delay accuracies are for both leading and trailing edges.
TEST SETUP DESCRIPTION
Figure 2 illustrates the hardware configuration used for measuring the timing parameters of the DS1135.
The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20ps resolution) connected to the output. The DS1135 output taps
are selected and connected to the interval counter by a VHF switch control unit. All measurements are
fully automated with each instrument controlled by the computer over an IEEE 488 bus.
TIME DELAY
OUT
IN
ONE OF THREE
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