參數(shù)資料
型號: DLP-IO16
廠商: Electronic Theatre Controls, Inc.
英文描述: DLP-IO16 Development System
中文描述: DLP技術(shù)的IO16開發(fā)系統(tǒng)
文件頁數(shù): 8/10頁
文件大?。?/td> 285K
代理商: DLP-IO16
Revision 1.0
8
A 74HC374 octal D flip-flop is used to buffer the digital outputs. Output data from the target
microcontroller is latched by the DOUT port pin which is generated by U13 the 74HC138 3-8
line decoder. The truth table for the 74HC138 is shown here.
MUXA
MUXB
MUXG2A
1-0
1-0
1-0
1-0
1-0 - Indicates a high to low transition
74HC138 Active Low Output
Y0 – USB Read
Y1 – USB Write
Y2 – DOUT
Y3 – DIN
0
1
0
1
0
0
1
1
POWER SUPPLY
The DLP-IO16 takes all needed operational power from the host PC's USB port. When the host
PC goes to Standby mode, the DLP-IO16 will also go to Standby mode after 3 milliseconds of no
USB bus activity. If the 5-volt power for the DLP-IO16 board is supplied by the target
electronics via the Digital I/O Interface connector (JP3) then the jumper at JP4 must be removed.
To help ensure compliance with the USB specification, power for the USB interface electronics
(FT8U245AM) should be supplied by the host PC’s USB interface.
相關(guān)PDF資料
PDF描述
DLP-USB1 USB to FIFO Parallel Interface Module
DLR5735 17.5 mm Single Character 5x7 Dot Matrix Alphanumeric Display
DLR5736 17.5 mm Single Character 5x7 Dot Matrix Alphanumeric Display
DLG5735 17.5 mm Single Character 5x7 Dot Matrix Alphanumeric Display
DLG5736 17.5 mm Single Character 5x7 Dot Matrix Alphanumeric Display
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