- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄17099 > DK-S6-EMBD-G-J (Xilinx Inc)DEV KIT EMBEDDED SPARTAN 6 PDF資料下載
參數(shù)資料
| 型號(hào)： | DK-S6-EMBD-G-J |
| 廠商： | Xilinx Inc |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | DEV KIT EMBEDDED SPARTAN 6 |
| 產(chǎn)品培訓(xùn)模塊： | S6 Family Overview |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Spartan®-6 |
| 類型： | FPGA |
| 適用于相關(guān)產(chǎn)品： | Spartan?-6 FPGA，XC6SLX45T-FGG484 |
| 所含物品： | 板，線纜，文檔，軟件 - 不包括電源 - |
| 其它名稱： | 122-1689 |
Spartan-6 Family Overview
DS160 (v2.0) October 25, 2011
Product Specification
5
Clock Management
Each Spartan-6 FPGA has up to six CMTs, each consisting of two DCMs and one PLL, which can be used individually or
cascaded.
DCM
The DCM provides four phases of the input frequency (CLKIN): shifted 0°, 90°, 180°, and 270° (CLK0, CLK90, CLK180, and
CLK270). It also provides a doubled frequency CLK2X and its complement CLK2X180. The CLKDV output provides a
fractional clock frequency that can be phase-aligned to CLK0. The fraction is programmable as every integer from 2 to 16,
as well as 1.5, 2.5, 3.5 . . . 7.5. CLKIN can optionally be divided by 2. The DCM can be a zero-delay clock buffer when a clock
signal drives CLKIN, while the CLK0 output is fed back to the CLKFB input.
Frequency Synthesis
Independent of the basic DCM functionality, the frequency synthesis outputs CLKFX and CLKFX180 can be programmed to
generate any output frequency that is the DCM input frequency (FIN) multiplied by M and simultaneously divided by D, where
M can be any integer from 2 to 32 and D can be any integer from 1 to 32.
Phase Shifting
With CLK0 connected to CLKFB, all nine CLK outputs (CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, CLKDV,
CLKFX, and CLKFX180) can be shifted by a common amount, defined as any integer multiple of a fixed delay. A fixed DCM
delay value (fraction of the input period) can be established by configuration and can also be incremented or decremented
dynamically.
Spread-Spectrum Clocking
The DCM can accept and track typical spread-spectrum clock inputs, provided they abide by the input clock specifications
listed in the Spartan-6 FPGA Data Sheet: DC and Switching Characteristics. Spartan-6 FPGAs can generate a spread-
spectrum clock source from a standard fixed-frequency oscillator.
PLL
The PLL can serve as a frequency synthesizer for a wider range of frequencies and as a jitter filter for incoming clocks in
conjunction with the DCMs. The heart of the PLL is a voltage-controlled oscillator (VCO) with a frequency range of
400 MHz to 1,080 MHz, thus spanning more than one octave. Three sets of programmable frequency dividers (D, M, and O)
adapt the VCO to the required application.
The pre-divider D (programmable by configuration) reduces the input frequency and feeds one input of the traditional PLL
phase comparator. The feedback divider (programmable by configuration) acts as a multiplier because it divides the VCO
output frequency before feeding the other input of the phase comparator. D and M must be chosen appropriately to keep the
VCO within its controllable frequency range.
The VCO has eight equally spaced outputs (0°, 45°, 90°, 135°, 180°, 225°, 270°, and 315°). Each can be selected to drive
one of the six output dividers, O0 to O5 (each programmable by configuration to divide by any integer from 1 to 128).
Clock Distribution
Each Spartan-6 FPGA provides abundant clock lines to address the different clocking requirements of high fanout, short
propagation delay, and extremely low skew.
Global Clock Lines
In each Spartan-6 FPGA, 16 global-clock lines have the highest fanout and can reach every flip-flop clock. Global clock lines
must be driven by global clock buffers, which can also perform glitchless clock multiplexing and the clock enable function.
Global clocks are often driven from the CMTs, which can completely eliminate the basic clock distribution delay.
I/O Clocks
I/O clocks are especially fast and serve only the localized input and output delay circuits and the I/O serializer/deserializer
(SERDES) circuits, as described in the I/O Logic section.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RBM12DCBH | CONN EDGECARD 24POS R/A .156 SLD |
| R-726.5D | CONV DC/DC 2A 8.5-28VIN 6.5V |
| SCRH6D28-680 | INDUCTOR SMD 68UH 0.65A 10KHZ |
| R-725.0P | CONV DC/DC 2A 6.5-28VIN 5V |
| EEM36DRMD-S288 | CONN EDGECARD 72POS .156 EXTEND |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DK-S6-EMBD-G-J-XP1 | 功能描述:DEV KIT EMBEDDED SPARTAN 6 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 通用嵌入式開(kāi)發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:Spartan®-6 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| DK-S6-EMBD-G-XP1 | 功能描述:DEV KIT EMBEDDED SPARTAN 6 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 通用嵌入式開(kāi)發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:Spartan®-6 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| DK-S7-00-1.0 | 功能描述:SKYEREADER DEVELOPMENT KIT RoHS:是 類別:RF/IF 和 RFID >> RFID 評(píng)估和開(kāi)發(fā)套件及電路板 系列:- 產(chǎn)品培訓(xùn)模塊:M24LR64 Dual Interface EEPROM 標(biāo)準(zhǔn)包裝:1 系列:- 類型:讀取器模塊 頻率:13.56MHz 適用于相關(guān)產(chǎn)品:M24LR-64-R 已供物品:2 根基準(zhǔn)天線，I2C 和 RFID 讀取器，樣品 其它名稱:497-10480 |
| DKSB1000C | 功能描述:PIC32 BREAKOUT BOARD RoHS:否 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 配件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 附件類型:適配器板 適用于相關(guān)產(chǎn)品:RCB230，RCB231，RCB212 配用:26790D-ND - RCB BREAKOUT BOARD RS232 CABLE |
| DKSB1001B | 功能描述:DSPIC33 BREAKOUT BOARD RoHS:否 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 配件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 附件類型:適配器板 適用于相關(guān)產(chǎn)品:RCB230，RCB231，RCB212 配用:26790D-ND - RCB BREAKOUT BOARD RS232 CABLE |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。