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參數(shù)資料
| 型號(hào)： | DJLXT972MLAA4 |
| 廠商： | Intel Corp. |
| 英文描述： | Single-Port 10/100 Mbps PHY Transceiver |
| 中文描述： | 單端口10/100 Mbps的物理層收發(fā)器 |
| 文件頁(yè)數(shù)： | 80/92頁(yè) |
| 文件大?。?/td> | 666K |
| 代理商： | DJLXT972MLAA4 |
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Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
80
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Table 46
lists auto-negotiation link partner base page ability bits.
Table 46. Auto-Negotiation Link Partner Base Page Ability Register - Address 5, Hex 5
Bit
Name
Description
Type
1
Default
5.15
Next Page
0 = Link Partner has no ability to send multiple pages.
1 = Link Partner has ability to send multiple pages.
RO
0
5.14
Acknowledge
0 = Link Partner has not received Link Code Word
from the LXT972M Transceiver.
1 = Link Partner has received Link Code Word from
the LXT972M Transceiver.
RO
0
5.13
Remote Fault
0 = No remote fault.
1 = Remote fault.
RO
0
5.12
Reserved
Ignore when read.
RO
0
5.11
Asymmetric
Pause
Pause operation defined in IEEE 802.3 Standard,
Clause 40 and 27.
0 = Link Partner is not Pause capable.
1 = Link Partner is Pause capable.
RO
0
5.10
Pause
0 = Link Partner is not Pause capable.
1 = Link Partner is Pause capable.
RO
0
5.9
100BASE-T4
0 = Link Partner is not 100BASE-T4 capable.
1 = Link Partner is 100BASE-T4 capable.
RO
0
5.8
100BASE-TX
Full-Duplex
0 = Link Partner is not 100BASE-TX full-duplex
capable.
1 = Link Partner is 100BASE-TX full-duplex capable.
RO
0
5.7
100BASE-TX
0 = Link Partner is not 100BASE-TX capable.
1 = Link Partner is 100BASE-TX capable.
RO
0
5.6
10BASE-T
Full-Duplex
0 = Link Partner is not 10BASE-T full-duplex capable.
1 = Link Partner is 10BASE-T full-duplex capable.
RO
0
5.5
10BASE-T
0 = Link Partner is not 10BASE-T capable.
1 = Link Partner is 10BASE-T capable.
RO
0
5.4:0
Selector Field
S<4:0>
<00001> = IEEE 802.3.
<00010> = IEEE 802.9 ISLAN-16T.
<00000> = Reserved for future auto-negotiation
development.
<11111> = Reserved for future auto-negotiation
development.
Unspecified or reserved combinations must not be
transmitted.
RO
0
1. RO = Read Only
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DJLXT972MLCA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLEA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNCA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNEA4 | Single-Port 10/100 Mbps PHY Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DJLXT972MLC.A4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLEA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
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