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參數(shù)資料
| 型號： | DC804A-B |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR LTC4267 |
| 設(shè)計資源： | DC804A Design File |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 電源管理，以太網(wǎng)供電（POE） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | LTC4267 |
| 已供物品： | 板 |
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LTC4267
19
4267fc
APPLICATIO S I FOR ATIO
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Signature Disable Interface
To disable the 25kΩsignatureresistor,connectSIGDISApin
to the VPORTP pin. Alternately, SIGDISA pin can be driven
high with respect to VPORTN. An example of a signature
disable interface is shown in Figure 16, option 2. Note that
the SIGDISA input resistance is relatively large and the
threshold voltage is fairly low. Because of high voltages
present on the printed circuit board, leakage currents from
the VPORTP pin could inadvertently pull SIGDISA high. To
ensure trouble-free operation, use high voltage layout
techniques in the vicinity of SIGDISA. If unused, connect
SIGDISA to VPORTN.
Load Capacitor
The IEEE 802.3af specication requires that the PD maintain
a minimum load capacitance of 5F (provided by C1 in
Figure 11). It is permissible to have a much larger load
capacitor and the LTC4267 can charge very large load
capacitors before thermal issues become a problem. The
load capacitor must be large enough to provide sufcient
energy for proper operation of the switching regulator.
However, the capacitor must not be too large or the PD
design may violate IEEE 802.3af requirements.
If the load capacitor is too large, there can be a problem
with inadvertent power shutdown by the PSE. Consider
the following scenario. If the PSE is running at – 57V
(maximum allowed) and the PD has detected and powered
up, the load capacitor will be charged to nearly – 57V. If
for some reason the PSE voltage is suddenly reduced to
–44V (minimum allowed), the input bridge will reverse bias
and the PD power will be supplied by the load capacitor.
Depending on the size of the load capacitor and the DC load
of the PD, the PD will not draw any power for a period of
time. If this period of time exceeds the IEEE 802.3af 300ms
disconnect delay, the PSE will remove power from the PD.
For this reason, it is necessary to ensure that inadvertent
shutdown cannot occur.
Very small output capacitors (≤10F) will charge very
quickly in current limit. The rapidly changing voltage at
the output may reduce the current limit temporarily, caus-
ing the capacitor to charge at a somewhat reduced rate.
Conversely, charging a very large capacitor may cause the
current limit to increase slightly. In either case, once the
output voltage reaches its nal value, the input current
limit will be restored to its nominal value.
The load capacitor can store signicant energy when fully
charged. The design of a PD must ensure that this energy
is not inadvertently dissipated in the LTC4267. The polar-
ity-protection diode(s) prevent an accidental short on the
cable from causing damage. However, if the VPORTN pin
is shorted to VPORTP inside the PD while the capacitor
is charged, current will ow through the parasitic body
diode of the internal MOSFET and may cause permanent
damage to the LTC4267.
Maintain Power Signature
In an IEEE 802.3af system, the PSE uses the maintain
power signature (MPS) to determine if a PD continues to
require power. The MPS requires the PD to periodically
draw at least 10mA and also have an AC impedance less
than 26.25kΩ in parallel with 0.05F. If either the DC
current is less than 10mA or the AC impedance is above
26.25kΩ, the PSE may disconnect power. The DC current
must be less than 5mA and the AC impedance must be
above 2MΩ to guarantee power will be removed.
Selecting Feedback Resistor Values
The regulated output voltage of the switching regulator is
determined by the resistor divider across VOUT (R1 and
R2 in Figure 11) and the error amplier reference voltage
VREF. The ratio of R2 to R1 needed to produce the desired
voltage can be calculated as:
R2 = R1 (VOUT – VREF)/VREF
In an isolated power supply application, VREF is determined
by the designer’s choice of an external error amplier.
Commercially available error ampliers or programmable
shunt regulators may include an internal reference of
1.25V or 2.5V. Since the LTC4267 internal reference and
error amplier are not used in an isolated design, tie the
VFB pin to PGND.
In a nonisolated power supply application, the LTC4267
onboard internal reference and error amplier can be
used. The resistor divider output can be tied directly to
the VFB pin. The internal reference of the LTC4267 is 0.8V
nominal.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DC804A-B | 制造商:Linear Technology 功能描述:EVAL BOARD, LTC4267 3.3V, 1.6A POE |
| DC804A-C | 功能描述:EVAL BOARD FOR LTC4267 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:數(shù)字電位器 嵌入式:- 已用 IC / 零件:AD5258 主要屬性:- 次要屬性:- 已供物品:板 相關(guān)產(chǎn)品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP |
| DC804A-C | 制造商:Linear Technology 功能描述:EVAL BOARD, LTC4267 3.3V, 2.6A POE |
| DC804B-A | 功能描述:EVAL BOARD FOR LTC4267 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:數(shù)字電位器 嵌入式:- 已用 IC / 零件:AD5258 主要屬性:- 次要屬性:- 已供物品:板 相關(guān)產(chǎn)品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP |
| DC804B-A | 制造商:Linear Technology 功能描述:EVAL BOARD, LTC4267 3.3V, 1A POE INTERFA |
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