t7 CS/LD Low to SCK Positive Edge ● 5ns <" />
參數(shù)資料
型號: DC1546A
廠商: Linear Technology
文件頁數(shù): 24/28頁
文件大?。?/td> 0K
描述: BOARD DAC LTC2754-16
軟件下載: QuikEval System
設(shè)計資源: DC1546A Design Files
DC1546A Schematic
標(biāo)準(zhǔn)包裝: 1
系列: QuikEval™, SoftSpan™
DAC 的數(shù)量: 4
位數(shù): 16
數(shù)據(jù)接口: 串行,SPI?
設(shè)置時間: 2µs
DAC 型: 電流
已供物品:
已用 IC / 零件: LTC2754-16
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LTC2754
5
2754f
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t7
CS/LD Low to SCK Positive Edge
5ns
t8
CS/LD High to SCK Positive Edge
5ns
t9
SRO Propagation Delay
CLOAD = 10pF
26
ns
t10
CLR Pulse Width Low
60
ns
t11
LDAC Pulse Width Low
20
ns
t12
CLR Low to RFLAG Low
CLOAD = 10pF (Note 11)
70
ns
t13
CS/LD High to RFLAG high
CLOAD = 10pF (Note 11)
60
ns
SCK Frequency
50% Duty Cycle (Note 12)
25
MHz
TIMING CHARACTERISTICS The denotes specications that apply over the full operating temperature range,
otherwise specications are at TA = 25°C.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Continuous operation above the specied maximum operating
junction temperature may impair device reliability.
Note 3: Because of the proprietary SoftSpan switching architecture, the
measured resistance looking into each of the specied pins is constant for
all output ranges if the IOUT1X and IOUT2X pins are held at ground.
Note 4: Input resistors measured from RINX to RCOMX; feedback resistors
measured from RCOMX to REFX.
Note 5: Using LT1469 with CFEEDBACK = 15pF. A ±0.0015% settling time
of 1.7μs can be achieved by optimizing the time constant on an individual
basis. See Application Note 74, Component and Measurement Advances
Ensure 16-Bit DAC Settling Time.
Note 6: Measured at the major carry transition, 0V to 5V range. Output
amplier: LT1469; CFB = 27pF.
Note 7. Full-scale transition; REF = 0V.
Note 8. Analog Crosstalk is dened as the AC voltage ratio VOUTB/VREFA,
expressed in dB. REFB is grounded, and DAC B is set to 0V-5V span and
zero-, mid- or full- scale code. VREFA is a 3VRMS, 1kHz sine wave. Crosstalk
between other DAC channels is similar or better.
Note 9. REF = 6VRMS at 1kHz. 0V to 5V range. DAC code = FS. Output
amplier = LT1469.
Note 10. Calculation from Vn = √4kTRB, where k = 1.38E-23 J/°K
(Boltzmann constant), R = resistance (Ω), T = temperature (°K), and B =
bandwidth (Hz). 0V to 5V Range; zero-, mid-, or full- scale.
Note 11. Guaranteed by design, not subject to test.
Note 12. When using SRO, maximum SCK frequency fMAX is limited by
SRO propagation delay t9 as follows:
fMAX =
1
2t9 + tS
()
, where tS is the setup time of the receiving device.
TYPICAL PERFORMANCE CHARACTERISTICS T
A = 25°C, unless otherwise noted.
LTC2754-16
TEMPERATURE (°C)
–40
–1.0
INL
(LSB)
–0.8
–0.4
–0.2
0.0
1.0
0.4
–20
20
0
40
–0.6
0.6
0.8
0.2
60
80
2754 G03
VDD = 5V
VREF = 5V
±10V RANGE
+INL
–INL
INL vs Temperature
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
CODE
0
–1.0
INL
(LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
16384
32768
2754 G01
–0.6
0.6
0.8
0.2
49152
65535
VDD = 5V
VREF = 5V
±10V RANGE
CODE
0
–1.0
DNL
(LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
16384
32768
2754 G02
–0.6
0.6
0.8
0.2
49152
65535
VDD = 5V
VREF = 5V
±10V RANGE
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