參數(shù)資料
型號: DC1384A-A
廠商: Linear Technology
文件頁數(shù): 21/22頁
文件大?。?/td> 0K
描述: BOARD DELTA SIGMA ADC LTC2452
軟件下載: QuikEval System
設(shè)計資源: DC1384A Design File
DC1384A Schematic
標準包裝: 1
系列: QuikEval™
ADC 的數(shù)量: 2
位數(shù): 16
采樣率(每秒): 60
數(shù)據(jù)接口: 串行,SPI?
輸入范圍: ±VREF
已用 IC / 零件: LTC2452
已供物品:
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LTC2452
8
2452fd
For more information www.linear.com/LTC2452
applicaTions inForMaTion
of magnitude when compared to traditional delta-sigma
architectures. This allows external filter networks to in-
terface directly to the LTC2452. Since the average input
sampling current is 50nA, an external RC lowpass filter
using 1kΩ and 0.1F results in <1LSB additional error.
Additionally, there is negligible leakage current between
IN+ and IN.
Reference Voltage Range
The LTC2453 reference input range is 2.5V to VCC. For the
simplest operation, REF can be shorted to VCC.
Input Voltage Range
As mentioned in the Output Data Format section, the out-
put code is given as 32768 VIN/VREF + 32768. For VIN
VREF, the output code is clamped at 65535 (all ones). For
VIN ≤ –VREF, the output code is clamped at 0 (all zeroes).
The LTC2452 includes a proprietary system that can,
typically, digitize each input 8LSB above VREF and below
GND, if the differential input is within ±VREF. As an ex-
ample (Figure 3), if the user desires to measure a signal
slightly below ground, the user could set VIN– = GND,
and VREF = 5V. If VIN+ = GND, the output code would be
approximately 32768. If VIN+ = GND – 8LSB = –1.22 mV,
the output code would be approximately 32760.
The total amount of overrange and underrange capability
is typically 31LSB for a given device. The 31LSB total
is distributed between the overrange and underrange
Figure 3. Output Code vs VIN+ with VIN– = 0
capability. For example, if the underrange capability is
8LSB,theoverrangecapabilityistypically31–8=23LSB.
Output Data Format
The LTC2452 generates a 16-bit direct binary encoded
result. It is provided as a 16-bit serial stream through the
SDO output pin under the control of the SCK input pin
(see Figure 4).
Letting VIN = (VIN+ – VIN–), the output code is given as
32768 VIN/VREF + 32768. The first bit output by the
LTC2452, D15, is the MSB, which is 1 for VIN+ ≥ VIN– and
0 for VIN+ < VIN–. This bit is followed by successively less
significant bits (D14, D13...) until the LSB is output by the
LTC2452. Table 1 shows some example output codes.
During the data output operation the CS input pin must
be pulled low (CS = LOW). The data output process starts
Table 1. LTC2452 Output Data Format
DIFFERENTIAL INPUT
VOLTAGE VIN+ – VIN–
D15
(MSB)
D14
D13
D12...D2 D1
D0
(LSB)
CORRESPONDING
DECIMAL VALUE
≥VREF
1
65535
VREF – 1LSB
1
0
65534
0.5VREF
1
0
49152
0.5VREF – 1LSB
1
0
1
49151
0
1
0
32768
–1LSB
0
1
32767
–0.5VREF
0
1
0
16384
–0.5VREF – 1LSB
0
1
16383
≤ –VREF
0
VIN+/VREF+
–0.001
OUTPUT
CODE
4
12
20
0.001
2452 F03
–4
–12
0
8
16
–8
–16
–20
–0.005
0
0.005
0.0015
SIGNALS
BELOW
GND
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