fO (Pin 1): Frequency Control Pin. Digital input that c" />
參數(shù)資料
型號: DC1009A-A
廠商: Linear Technology
文件頁數(shù): 3/36頁
文件大?。?/td> 0K
描述: BOARD DELTA SIGMA ADC LTC2492
軟件下載: QuikEval System
設計資源: DC1009A Design File
DC1009A Schematic
標準包裝: 1
系列: Easy Drive™, QuikEval™
ADC 的數(shù)量: 1
位數(shù): 24
采樣率(每秒): 7.5
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
已用 IC / 零件: LTC2492
已供物品:
相關產(chǎn)品: LTC2492CDE#TRPBF-ND - IC ADC 24BIT DELTA SIG 14-DFN
LTC2492IDE#TRPBF-ND - IC ADC 24BIT DELTA SIG 14-DFN
LTC2492IDE#PBF-ND - IC ADC 24BIT DELTA SIG 14-DFN
LTC2492CDE#PBF-ND - IC ADC 24BIT DELTA SIG 14-DFN
LTC2492
11
2492fd
PIN FUNCTIONS
fO (Pin 1): Frequency Control Pin. Digital input that controls
the internal conversion clock rate. When fO is connected to
GND, the converter uses its internal oscillator running at
307.2kHz. The conversion clock may also be overridden by
driving the fO pin with an external clock in order to change
the output rate and the digital lter rejection null.
SDI (Pin 2): Serial Data Input. This pin is used to select
the line frequency rejection mode, 1
× or 2× speed mode,
temperature sensor, as well as the input channel. The serial
data input is applied under control of the serial clock (SCK)
during the data output/input operation. The rst conversion
following a new input or mode change is valid.
SCK (Pin 3): Bidirectional, Digital I/O, Clock Pin. In Internal
Serial Clock Operation mode, SCK is generated internally
and is seen as an output on the SCK pin. In External Serial
Clock Operation mode, the digital I/O clock is externally
applied to the SCK pin. The Serial Clock operation mode
is determined by the logic level applied to the SCK pin at
power up and during the most recent falling edge of CS.
CS (Pin 4): Active LOW Chip Select. A LOW on this pin
enables the digital input/output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the data output aborts the data transfer and starts
a new conversion.
SDO (Pin 5): Three-State Digital Output. During the data
output period, this pin is used as the serial data output.
When the chip select pin is HIGH, the SDO pin is in a high
impedance state. During the conversion and sleep periods,
this pin is used as the conversion status output. When
the conversion is in progress this pin is HIGH; once the
conversion is complete SDO goes low. The conversion
status is monitored by pulling CS LOW.
GND (Pin 6): Ground. Connect this pin to a common ground
plane through a low impedance connection.
COM (Pin 7): The common negative input (IN) for all
single-ended multiplexer congurations. The voltage on
CH0 to CH3 and COM pins can have any value between
GND – 0.3V to VCC + 0.3V. Within these limits, the two
selected inputs (IN+ and IN) provide a bipolar input range
(VIN = IN+ – IN) from –0.5 VREF to 0.5 VREF. Outside
this input range, the converter produces unique over-range
and under-range output codes.
CH0 to CH3 (Pins 8-11): Analog Inputs. May be
programmed for single-ended or differential mode.
VCC (Pin 12): Positive Supply Voltage. Bypass to GND with
a 10μF tantalum capacitor in parallel with a 0.1μF ceramic
capacitor as close to the part as possible.
REF+ (Pin 13), REF(Pin 14):
Differential Reference Input.
The voltage on these pins can have any value between
GND and VCC as long as the reference positive input, REF+,
remains more positive than the negative reference input,
REF, by at least 0.1V. The differential voltage (VREF = REF+
– REF ) sets the full-scale range for all input channels.
When performing an on-chip temperature measurement,
the minimum value of REF = 2V.
Exposed Pad (Pin 15): Ground. This pin is ground and
must be soldered to the PCB ground plane. For prototyping
purposes, this pin may remain oating.
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