型號(hào) | 廠商 | 描述 |
ep20k60eqc208-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Dual Voltage Monitor with Intergrated CPU Supervisor | |
ep20k60eqc240-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Dual Voltage Monitor with Intergrated CPU Supervisor | |
ep20k60eqc240-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60eqc240-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Dual Voltage Monitor with Intergrated CPU Supervisor | |
ep20k60eqi208-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Dual Voltage Monitor with Intergrated CPU Supervisor | |
ep20k60eqi208-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Dual Voltage Monitor with Intergrated CPU Supervisor | |
ep20k60eri240-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60eri240-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60eri240-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60etc144-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60etc144-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60etc144-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60eti144-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60eti144-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k60eti144-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Dual Voltage Monitor with Intergrated CPU Supervisor | |
ep20k100eri208-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Single Digitally Controlled Potentiometer (XDCP™); Temperature Range: -40°C to 85°C; Package: 8-MSOP | |
ep20k100eri208-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Single Digitally Controlled Potentiometer (XDCP™); Temperature Range: -40°C to 85°C; Package: 8-MSOP | |
ep20k100eri208-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k100eri240-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k100eri240-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k100eri240-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k100etc144-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000cf672i8es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Single Digitally Controlled Potentiometer (XDCP™), Low Noise/Low Power/I2C Bus/256 Taps; Temperature Range: -40°C to 85°C; Package: 8-MSOP | |
ep20k1000cf672i9es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Single Digitally Controlled Potentiometer (XDCP™), Low Noise/Low Power/I2C Bus/256 Taps; Temperature Range: -25°C to 85°C; Package: 8-MSOP | |
ep20k1000ebc652-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Single Digitally Controlled Potentiometer (XDCP™), Low Noise/Low Power/I2C Bus/256 Taps; Temperature Range: -40°C to 85°C; Package: 8-MSOP | |
ep20k1000ebc652-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Single Digitally Controlled Potentiometer (XDCP™), Low Noise/Low Power/I2C Bus/256 Taps; Temperature Range: -40°C to 85°C; Package: 8-MSOP T&R | |
ep20k1000ebc652-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000ebi652-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digitally Controlled Potentiometers (XDCP™); Temperature Range: -40°C to 85°C; Package: 20-TSSOP | |
ep20k1000ebi652-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digitally Controlled Potentiometers (XDCP™); Temperature Range: -25°C to 85°C; Package: 20-TSSOP | |
ep20k1000ebi652-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digitally Controlled Potentiometers (XDCP™); Temperature Range: -40°C to 85°C; Package: 20-TSSOP | |
ep20k1000efc1020-1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digitally Controlled Potentiometers (XDCP™); Temperature Range: -40°C to 85°C; Package: 14-TSSOP | |
ep20k1000efc1020-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digitally Controlled Potentiometers (XDCP™); Temperature Range: -40°C to 85°C; Package: 14-TSSOP | |
ep20k1000efc1020-1x 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digitally Controlled Potentiometers (XDCP™); Temperature Range: -40°C to 85°C; Package: 14-TSSOP | |
ep20k1000efc1020-2 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000efc1020-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digitally Controlled Potentiometers (XDCP™); Temperature Range: -40°C to 85°C; Package: 14-TSSOP | |
ep20k1000efc1020-2x 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digital Controlled Potentiometers (XDCP™); Low Noise, Low Power, I2C® Bus, 256 Taps; Temperature Range: -40°C to 85°C; Package: 10-MSOP | |
ep20k1000efc1020-3 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Quad Digital Controlled Potentiometers (XDCP™); Low Noise, Low Power, I2C® Bus, 256 Taps; Temperature Range: -40°C to 85°C; Package: 10-MSOP | |
ep20k1000efc1020-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000efc672-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000efc672-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000efc672-3es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000efi1020-1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
600mA Low Quiescent Current 1.6MHz High Efficiency Synchronous Buck Regulator; Temperature Range: -40°C to 85°C; Package: 8-DFN T&R | |
ep20k1000efi1020-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000efi1020-1x 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k1000efi1020-2 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Charging System Safety Circuit; Temperature Range: -40°C to 85°C; Package: 12-QFN | |
ep20k1000efi1020-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Li-ion Battery Charger; Temperature Range: -40°C to 85°C; Package: 10-DFN | |
ep20k100bi356-1es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Charging System Safety Circuit; Temperature Range: -40°C to 85°C; Package: 12-DFN T&R | |
ep20k100bi356-2 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Field Programmable Gate Array (FPGA) | |
ep20k100bi356-2es 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
FPGA | |
ep20k100bi356-3 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
Charging System Safety Circuit; Temperature Range: -40°C to 85°C; Package: 12-DFN |