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參數(shù)資料
| 型號： | DAC7512N/3K |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 12 us SETTLING TIME, 12-BIT DAC, PDSO6 |
| 封裝： | SOT-23, 6 PIN |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 393K |
| 代理商： | DAC7512N/3K |
13
DAC7512
SBAS156
DB13
DB12
OPERATING MODE
0
Normal Operation
Power-Down Modes:
0
1
Output 1k
to GND
1
0
Output 100k
to GND
1
High-Z
SYNC INTERRUPT
In a normal write sequence, the SYNC line is kept LOW for
at least 16 falling edges of SCLK and the DAC is updated
on the 16th falling edge. However, if SYNC is brought
HIGH before the 16th falling edge, this acts as an interrupt
to the write sequence. The shift register is reset and the write
sequence is seen as invalid. Neither an update of the DAC
register contents or a change in the operating mode occurs,
as shown in Figure 4.
POWER-ON-RESET
The DAC7512 contains a power-on-reset circuit that con-
trols the output voltage during power-up. On power-up, the
DAC register is filled with zeros and the output voltage is
0V; it remains there until a valid write sequence is made to
the DAC. This is useful in applications where it is important
to know the state of the output of the DAC while it is in the
process of powering up.
POWER-DOWN MODES
The DAC7512 contains four separate modes of operation.
These modes are programmable by setting two bits (PD1
and PD0) in the control register. Table I shows how the state
of the bits corresponds to the mode of operation of the
device.
When both bits are set to 0, the part works normally with its
normal power consumption of 135
A at 5V. However, for
the three power-down modes, the supply current falls to
200nA at 5V (50nA at 3V). Not only does the supply current
fall, but the output stage is also internally switched from the
output of the amplifier to a resistor network of known
values. This has the advantage that the output impedance of
DB15
DB0
X
PD1
PD0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
the part is known while the part is in power-down mode.
There are three different options. The output is connected
internally to GND through a 1kW resistor, a 100kW resistor
or it is left open-circuited (High-Z). The output stage is
illustrated in Figure 5.
All linear circuitry is shut down when the power-down mode
is activated. However, the contents of the DAC register are
unaffected when in power-down. The time to exit power-
down is typically 2.5
s for V
DD = 5V and 5s for VDD = 3V.
See the Typical Performance Curves for more information.
TABLE I. Modes of Operation for the DAC7512.
FIGURE 5. Output Stage During Power-Down.
FIGURE 3. Data Input Register.
FIGURE 4. SYNC Interrupt Facility.
Resistor
String DAC
Amplifier
Power-down
Circuitry
Resistor
Network
V
OUT
CLK
SYNC
D
IN
Invalid Write Sequence:
SYNC HIGH before 16th Falling Edge
Valid Write Sequence: Output Updates
on the 16th Falling Edge
DB15
DB0
DB15
DB0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DAC7513 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power, Rail-to-Rail Output, 12-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER |
| DAC7513E | 制造商:Texas Instruments 功能描述:IC 12BIT DAC SMD 7513 VSSOP8 |
| DAC7513E/250 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Lo-Pwr R-To-R Output 12-Bit Serial Input RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC7513E/250G4 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Lo-Pwr R-To-R Output 12-Bit Serial Input RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC7513E/2K5 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Lo-Pwr R-To-R Output 12-Bit Serial Input RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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