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參數(shù)資料
| 型號(hào)： | DAC1205D750HW |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | DAC |
| 英文描述： | Dual 12-bit DAC, up to 750 Msps; 2x 4x and 8x interpolating |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 12-BIT DAC, PQFP100 |
| 封裝： | 14 X 14 MM, 1 MM HEIGHT, PLASTIC, MS-026, SOT638-1, HTQFP-100 |
| 文件頁數(shù)： | 1/42頁 |
| 文件大小： | 352K |
| 代理商： | DAC1205D750HW |
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1. General description
The DAC1205D750 is a high-speed 12-bit dual channel Digital-to-Analog Converter
(DAC) with selectable 4
or 8
interpolating filters optimized for multi-carrier wireless
transmitters.
Thanks to its digital on-chip modulation, the DAC1205D750 allows the complex I and Q
inputs to be converted from BaseBand (BB) to IF. The mixing frequency is adjusted via a
Serial Peripheral Interface (SPI) with a 32-bit Numerically Controlled Oscillator (NCO) and
the phase is controlled by a 16-bit register.
Two modes of operation are available: separate data ports or a single interleaved
high-speed data port. In the Interleaved mode, the input data stream is demultiplexed into
its original I and Q data and then latched.
A 4
and 8
clock multiplier enables the DAC1205D750 to provide the appropriate
internal clocks from the internal PLL. The internal PLL can be bypassed enabling the use
of an external high frequency clock. The voltage regulator enables adjustment of the
output full-scale current.
2. Features and benefits
Dual 12-bit resolution
DAC1205D750
Dual 12-bit DAC, up to 750 Msps; 4x and 8x interpolating
Rev. 3 — 7 June 2011
Product data sheet
IMD3: 74 dBc; f
s
= 737.28 Msps;
f
o
= 140 MHz
ACPR: 69 dBc; 2-carrier WCDMA;
f
s
= 737.28 Msps; f
o
= 153.6 MHz
750 Msps maximum update rate
Selectable 4
or 8
interpolation filters
Typical 1.2 W power dissipation at 4
interpolation, PLL off and 740 Msps
Power-down and Sleep modes
Input data rate up to 185 Msps
Very low noise cap-free integrated PLL
Differential scalable output current from
1.6 mA to 22 mA
On-chip 1.25 V reference
External analog offset control
(10-bit auxiliary DACs)
Internal digital offset control
Inverse x / (sin x) function
Fully compatible SPI port
32-bit programmable NCO frequency
Dual port or Interleaved data modes
1.8 V and 3.3 V power supplies
LVDS compatible clock
Two’s complement or binary offset
data format
1.8 V/3.3 V CMOS input data buffers
Industrial temperature range from
40
C to +85
C
相關(guān)PDF資料 |
PDF描述 |
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| DAC1205D750HW | Dual 12-bit DAC, up to 750 Msps; 2x 4x and 8x interpolating |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC1205D750HW/C1,5 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC DL 12BIT DAC 750MSPS RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1208 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit, uP Compatible, Double-Buffered D to A Converters |
| DAC1208D650 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A interface |
| DAC1208D650HN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A interface |
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