- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373038 > DAC1008D650HN (NXP SEMICONDUCTORS) Dual 10-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating PDF資料下載
參數(shù)資料
| 型號： | DAC1008D650HN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | DAC |
| 英文描述： | Dual 10-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating |
| 中文描述： | 10-BIT DAC, PQCC64 |
| 封裝： | 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64 |
| 文件頁數(shù)： | 23/98頁 |
| 文件大?。?/td> | 551K |
| 代理商： | DAC1008D650HN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當(dāng)前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁
DAC1008D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 17 December 2010
23 of 98
NXP Semiconductors
DAC1008D650
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
10.3 Serial Peripheral Interface (SPI)
10.3.1
Protocol description
The DAC1008D650 serial interface is a synchronous serial communication port allowing
easy interfacing with many industry microprocessors. It provides access to the registers
that define the operating modes of the chip in both Write mode and Read mode.
This interface can be configured as a 3-wire type (SDIO as bidirectional pin) or a 4-wire
type (SDIO and SDO as unidirectional pin, input and output port respectively). In both
configurations, SCLK acts as the serial clock and SCS_N acts as the serial chip select
bar.
Each read/write operation is sequenced by the SCS_N signal and enabled by a LOW
assertion to drive the chip with two bytes to five bytes, depending on the content of the
instruction byte (see
Table 8
).
Table 7.
R/W
0
1
In
Table 8
below, N1 and N0 indicate the number of bytes transferred after the instruction
byte.
Table 8.
N1
0
0
1
1
A[4:0] indicates which register is being addressed. In the case of a multiple transfer, this
address points to the first register to be accessed. The address is then internally
decreased after each following data phase.
R/W indicates the mode access, (see
Table 7
).
Fig 13. SPI protocol
001aaj812
RESET_N
SCS_N
SCLK
SDIO
SDO
(optional)
R/W
N1
N0
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
Read or Write mode access description
Description
Write mode operation
Read mode operation
Number of bytes to be transferred
N0
0
1
0
1
Number of bytes transferred
1
2
3
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DAC1008D650HN | Dual 10-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating |
| DAC1008D750HN | Dual 10-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating |
| DAC1008D750HN | Dual 10-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating |
| DAC1208D650HN | Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating |
| DAC1208D650HN | Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC1008D650HN/C1,5 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC DL 10BIT DAC 650MSPS 2X 4X OR 8X INT RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1008D650HN-C1 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1008D750 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 10-bit DAC up to 750 Msps 2×, 4× or 8× interpolating with JESD204A interface |
| DAC1008D750_11 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 10-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。