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參數(shù)資料
| 型號(hào)： | CY28508OXC |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 2/13頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK SSCG 3DIFF PAIR 28SSOP |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 類型： | * |
| PLL： | 是 |
| 輸入： | 晶體 |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:4 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 333.3MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
CY28508
...................... Document #: 38-07534 Rev. *F Page 10 of 13
Absolute Maximum Conditions[2]
Parameter
Description
Condition
Min.
Max.
Unit
VDD, VDDC,
VDDA, VDDX
3.3V Supply Voltage
Maximum functional voltage
–0.5
5.5
V
VDDQ
Analog Supply Voltage
Maximum functional voltage
–0.5
5.5
V
VIN
Input Voltage
Relative to V SS
–0.5
VDD + 0.5
V
TS
Temperature, Storage
Non-functional
–65
150
°C
TA
Temperature, Operating Ambient
Functional
0
70
°C
TJ
Temperature, Junction
Functional
150
°C
ESDHBM
ESD Protection (Human Body Model)
MIL-STD-883, Method 3015
2000
–
V
JC
Dissipation, Junction to Case
Mil-Spec 883E Method 1012.1
42
°C/W
JA
Dissipation, Junction to Ambient
JEDEC (JESD 51)
118
°C/W
UL–94
Flammability Rating
At 1/8 in.
V–0
MSL
Moisture Sensitivity Level
1
DC Electrical Specifications
Parameter
Description
Condition
Min.
Typ.
Max.
Unit
VDD, VDDA,
VDDX, VDDC
3.3 Operating Voltage
3.3 ± 5%
3.135
3.300
3.465
V
VDDQ
2.5 Operating Voltage
2.5 ± 5%
2.375
2.500
2.625
V
VIL
Input Low Voltage
VIL for all inputs except XIN
1.0
Vdc
VIH
Input High Voltage
VIH for all inputs except XIN
2.0
Vdc
IILC
Input Leakage Current
Except for internal pull-up or pull-down
resistors
–5
5
A
IIL
Input Low Current (@VIL = VSS)
For internal pull-up resistors
9
A
IIH
Input High Current (@VIL =VDD)
For internal pull-down resistors
–9
A
IOLI2C
I2C Sink Current
mA
VOL
Output Low Voltage
REF output
0.4
Vdc
VOH
Output High Voltage
REF output
2.4
Vdc
VOLC
Output Low Voltage CPU
At load measurement point with recom-
mended termination. See Figure 7.
0.0
0.4
Vdc
VOHC
Output High Voltage CPU
At load measurement point with recom-
mended termination. See Figure 7.
0.6
1.6
Vdc
VXIH
Xin High Voltage
0.7VDDX
VDDX
V
VXIL
Xin Low Voltage
0
0.3VDDX
V
IOZ
Three-state leakage Current
10
A
CIN
Input Pin Capacitance
For all pins including XIN
5
pF
COUT
Output Pin Capacitance
6pF
LIN
Input Pin Inductance
7nH
ZOUT
Output Impedance of CPU Clock
Both rising and falling
18
IDD3A
Power supply current for all 3.3V VDDs
with all three buffers enabled and
loaded
Output is 224.7 MHz with VCO running
666.6 MHz
80
100
mA
IDD3B
Power supply current for all 3.3V VDDs
with VDDs with two buffers enabled and
loaded
Output is 224.7 MHz with VCO running
666.6 MHz
78
100
mA
IDD3C
Power supply current for all 3.3V VDDs
with one buffer enabled and loaded
Output is 224.7 MHz with VCO running
666.6 MHz
77
100
mA
Note:
2. Multiple Sequence: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
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