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參數(shù)資料
| 型號(hào)： | CY28409OXC |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK CK409GRANTSDALE 56TSSOP |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 類型： | * |
| PLL： | 是 |
| 輸入： | 晶體 |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:21 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 400MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
| 其它名稱： | SLCY28409OXC |
CY28409
........................Document #: 38-07445 Rev. *D Page 2 of 16
Pin Description
Pin No.
Name
Type
Description
1, 2
REF(0:1)
O, SE Reference Clock. 3.3V 14.318-MHz clock output.
4XIN
I
Crystal Connection or External Reference Frequency Input. This pin has dual
functions. It can be used as an external 14.318-MHz crystal connection or as an external
reference frequency input.
5
XOUT
O, SE Crystal Connection. Connection for an external 14.318-MHz crystal output.
41,44,47
CPUT(0:2)
O, DIF CPU Clock Output. Differential CPU clock outputs. See Table 1 for frequency config-
uration.
40,43,46
CPUC(0:2)
O, DIF CPU Clock Output. Differential CPU clock outputs. See Table 1 for frequency config-
uration.
38, 37
SRCT, SRCC
O, DIF Differential serial reference clock.
22,23,26,27
3V66(0:3)
O, SE 66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO.
29
3V66_4VCH
O, SE 48-/66-MHz Clock Output. 3.3V selectable through SMBus to be 66 or 48 MHz.
7,8,9
PCIF(0:2)
O, SE Free-running PCI Output. 33-MHz clocks divided down from 3V66.
12,13,14,
15,18,19,20
PCI(0:6)
O, SE PCI Clock Output. 33-MHz clocks divided down from 3V66.
31,
USB_48
O, SE Fixed 48-MHz clock output.
32
DOT_48
O, SE Fixed 48-MHz clock output.
51,56
FS_A, FS_B
I
3.3V LVTTL input for CPU frequency selection.
52
IREF
I
Current Reference. A precision resistor is attached to this pin which is connected to
the internal current reference.
21
PD#
I, PU
3.3V LVTTL input for Power-Down# active LOW.
50
CPU_STP#
I, PU
3.3V LVTTL input for CPU_STP# active LOW.
49
PCI_STP#
I, PU
3.3V LVTTL input for PCI_STP# active LOW.
35
VTT_PWRGD#
I
3.3V LVTTL input is a level sensitive strobe used to latch the FS_A and FS_B
inputs (active LOW).
30
SDATA
I/O
SMBus-compatible SDATA.
28
SCLK
I
SMBus-compatible SCLOCK.
53
VSS_IREF
GND
Ground for current reference.
55
VDD_A
PWR
3.3V power supply for PLL.
54
VSS_A
GND
Ground for PLL.
42,48
VDD_CPU
PWR
3.3V power supply for outputs.
45
VSS_CPU
GND
Ground for outputs.
36
VDD_SRC
PWR
3.3V power supply for outputs.
39
VSS_SRC
GND
Ground for outputs.
34
VDD_48
PWR
3.3V power supply for outputs.
33
VSS_48
GND
Ground for outputs.
10,16
VDD_PCI
PWR
3.3V power supply for outputs.
11,17
VSS_PCI
GND
Ground for outputs.
24
VDD_3V66
PWR
3.3V power supply for outputs.
25
VSS_3V66
GND
Ground for outputs.
3
VDD_REF
PWR
3.3V power supply for outputs.
6
VSS_REF
GND
Ground for outputs.
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相關(guān)代理商/技術(shù)參數(shù) |
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| CY28409OXCT | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CY28409ZC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409ZCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409ZXC | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CY28409ZXCT | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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