參數(shù)資料
型號: CXD2403AR
文件頁數(shù): 3/25頁
文件大小: 1286K
代理商: CXD2403AR
1
2
3
4
5
6
7
8
9
V
DD
2
PLNT
XCLR
SLFR
N.C.
SLCK
TST0
TST1
TST2
N.C.
N.C.
N.C.
V
EE
N.C.
N.C.
CLR
EN
VST
VCK1
VCK2
HST
HCK2
HCK1
V
SS
3
V
SS
2
N.C.
SYNC
FLDI
FLDO
VD
SH1
SH2
SH3
FRP
XCLP
HD
RPD
V
DD
1
CKO
CKI
I
I
I
I
L
H
L
L
L
L
L
I
I
I
I
I
O
O
O
O
O
O
O
O
I
I
I
I
O
O
O
O
O
O
O
O
O
I
O
I
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
5V system power supply
Switches between PAL (High) and NTSC (Low)
Reset at 0V
Switches between field inversion (High) and line inversion (Low)
No connected
Switches between LCX003/004 (Low) and LCX005 (High)
Test
Test
Test
No connected
No connected
No connected
12V system power supply
No connected
No connected
CLR pulse output (positive polarity)
EN pulse output (negative polarity)
V start pulse output (positive polarity)
V clock pulse 1 output (positive polarity)
V clock pulse 2 output (positive polarity)
H start pulse output (positive polarity)
H clock pulse 2 output (positive polarity)
H clock pulse 1 output (positive polarity)
12V system GND
5V system GND
No connected
Composite sync input (positive polarity)
Field identification signal input ODD (High)/EVEN (Low)
Field identification signal output
VD pulse output (positive polarity)
Sample-and-hold pulse output (positive polarity)
Sample-and-hold pulse output (positive polarity)
Sample-and-hold pulse output (positive polarity)
AC drive timing pulse output
Burst position clamp pulse output (negative polarity)
HD pulse output (positive polarity)
Phase comparator output
5V system power supply
Oscillation cell (output)
Oscillation cell (input)
CXD2403AR
–3–
Pin Description
(H: Pull Up, L: Pull Down)
Pin
No.
Symbol
I/O
Description
Input Pin for
Open Status
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