參數(shù)資料
型號(hào): CXA3314ER
英文描述: 6GHz PLL
中文描述: 6GHz的鎖相環(huán)
文件頁數(shù): 11/15頁
文件大?。?/td> 503K
代理商: CXA3314ER
– 11 –
CXA3309ER
Design Materials (Design Guarantee)
Electrical Characteristics
(V
CC
= 2.7 to 3.8V, Ta = –25 to +85°C)
Unless otherwise specified, the I/Q baseband input signals and local input signal use the conditions shown in
the Electrical Characteristics Measurement Circuit and the control voltage and power saving pins are set to
VCONT = 2.3V, PS = high.
IF output impedance is 1k
.
Set the L, C values between Pins 8, 9 and 11, 12 to resonate at f = 570MHz.
Values measured with a Sony evaluation board.
DC Characteristics
Current consumption 1
Current consumption 2
Power saving current
AC Characteristics
Output IP3
Output power 1
Output power 2
Gain control range
Gain flatness
Output noise power 1
Output noise power 2
I, Q residual sideband
product
Carrier leak
Input I/Q phase error
Input I/Q gain error
Error vector magnitude
Response time
Imax
Imin
Ips
OIP3
P
O1
P
O2
Gcr
Gflat
No
1
No
2
Img
CL
IQ
PE
IQ
GE
EVM
Tr
VCONT = 2.85V
VCONT = 0V
PS = low (in power saving mode)
Note1
VCONT = 2.3V,
differential output, f = 570MHz
VCONT = 0.3V,
differential output, f = 570MHz
VCONT = 0.3 to 2.3V,
f = 570MHz
IF ± 2.5MHz
P
O
= –25dB,
I/Q inputs are no signal.
P
O
= –65dBm,
I/Q inputs are no signal.
Suppression ratio of desired signal
(f = 570 + 1) MHz and image
signal (f = 570 – 1) MHz
Ratio of desired signal
(f = 570 + 1) MHz and local leak
(f = 570) MHz
Input signal I/Q phase difference
–90° when the output signal I/Q
phase difference is 90°.
I/Q input signal level difference
when output signal I/Q levels are
the same.
Until output rise of 90% after the
power is turned ON.
21.5
17.5
8.5
–19
–83
54
–0.25
–3
–2.5
32
26
–15
–77
62
0
0
0
43
32.5
5
–11
–73
70
0.25
–147
–162
–25
–18
3
2.5
3
10
mA
μA
dBm
dBm
dB
dB
dBm/
Hz
dBc
deg
dB
%
μs
A
A
A
B
B
B
B
B
B
B
B
B
B
B
B
B
Item
Symbol
Conditions
Min. Typ. Max.
Unit
Measurement
point
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