參數(shù)資料
型號(hào): CS8420-DSZ
廠(chǎng)商: Cirrus Logic Inc
文件頁(yè)數(shù): 91/94頁(yè)
文件大?。?/td> 0K
描述: IC CONV S/R DGTL AUDIO 28-SOIC
標(biāo)準(zhǔn)包裝: 27
類(lèi)型: 采樣率轉(zhuǎn)換器
應(yīng)用: 數(shù)字音頻
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC
包裝: 管件
產(chǎn)品目錄頁(yè)面: 759 (CN2011-ZH PDF)
其它名稱(chēng): 598-1729
DS245F4
91
CS8420
17. PARAMETER DEFINITIONS
Input Sample Rate (Fsi)
The sample rate of the incoming digital audio.
Input Frame Rate
The frame rate of the received AES3 format data.
Output Sample Rate (Fso)
The sample rate of the outgoing digital audio.
Output Frame Rate
The frame rate of the transmitted AES3 format data.
Dynamic Range
The ratio of the maximum signal level to the noise floor.
Total Harmonic Distortion and Noise
The ratio of the noise and distortion to the test signal level. Normally referenced to 0 dBFS.
Peak Idle Channel Noise Component
With an all-zero input, what is the amplitude of the largest frequency component visible with a 16K point
FFT. The value is in dB ratio to full-scale.
Input Jitter Tolerance
The amplitude of jitter on the AES3 stream, or in the ILRCK clock, that will cause measurable artifacts in the
SRC output. Test signal is full scale 9 kHz, Fsi is 48 kHz, Fso is different 48 kHz, jitter is 2 kHz sinusoidal,
and audio band white noise.
AES3 Transmitter Output Jitter
With a jitter free OMCK clock, what is the jitter added by the AES3 transmitter.
Gain Error
The difference in amplitude between the output and the input signal level, within the passband of the digital
filter in the SRC.
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