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參數(shù)資料
| 型號： | CS7054 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | Low Side PWM FET Controller |
| 中文描述： | 場效應(yīng)低邊PWM控制器 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 143K |
| 代理商： | CS7054 |
C
2
Storage Temperature................................................................................................................................................-65C to 150C
V
CC
................................................................................................................................................................................-0.3V to 30V
Supply Voltage Range (load dump = 26Vw/series 51 resistor) V
CC
Peak Transient Voltage.....................................40V
Input Voltage Range (at any input) ...........................................................................................................................-0.3V to 10V
Maximum Junction Temperature..........................................................................................................................................150C
ESD Capability (Human Body Model) ....................................................................................................................................2kV
Lead Temperature Soldering: Wave Solder (through hole styles only)..........................................10 sec. max, 260C peak
Absolute Maximum Ratings
Electrical Characteristics:
8V < V
CC
< 16V, -40C < T
A
< 125C, (unless otherwise specified)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
V
CC
Supply
Operating Current Supply
5
10
mA
Quiescent Current
V
CC
= 12V
170
275
μA
Overvoltage Shutdown
18
19.5
21
V
Overvoltage Hysteresis
150
325
500
mV
I
Control (CTL)
Control Input Current
CTL = 0V to 5V
-2
0.1
2
μA
Sleep Mode Threshold
8%
10%
12%
V
REG
Sleep Mode Hysteresis
50
100
150
mV
I
Current Sense
Differential Voltage Sense
I
ADJ
=51.2% V
REG
and R
CS1
= 51
60.5
79.5
mV
I
ADJ
Input Current
I
ADJ
= 0V to 5V
-5
0.3
2
μA
I
Linear Regulator V
REG
Output Voltage
V
CC
= 13.2V
4.85
5.00
5.15
V
I
Inhibit
Inhibit Threshold
40%
50%
60%
V
REG
Inhibit Hysteresis
150
325
500
mV
I
External Drive (OUTPUT)
Output Frequency
R
OSC
= 105k, C
OSC
= 390pF
17
20
23
kHz
Voltage to Duty Cycle
Conversion
V
CC
= 13V, CTL = 30% V
REG
V
CC
= 13V, CTL = 70% V
REG
26.3
69.5
38.5
81.5
%
%
Output Rise Time
V
CC
= 13V, R
GATE
= 6, C
GATE
= 5nF
.25
1
μs
Output Fall Time
V
CC
= 13V, R
GATE
= 6, C
GATE
= 5nF
.30
1
μs
Output Sink Current
V
CC
= 13V, R
GATE
= 6, C
GATE
= 5nF
400
mA
Output Source Current
V
CC
= 13V, R
GATE
= 6, C
GATE
= 5nF
400
mA
Output High Voltage
I
OUT
= 1mA
V
CC
- 1.7
V
Output Low Voltage
I
OUT
= -1mA
1.3
V
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