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參數(shù)資料
| 型號： | CS5550-ISZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 2CH LOW-COST 24-SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 4k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 30mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個差分，雙極 |
CS5550
6
DS630F1
ANALOG CHARACTERISTICS (Continued)
Notes: 3. The minimum FSCR is limited by the maximum allowed gain register value.
4. All outputs unloaded. All inputs CMOS level.
5. Definition for PSRR: VREFIN tied to VREFOUT, VA+ = VD+ = 5 V, a 150 mV (zero-to-peak) (60 Hz) sinewave is imposed onto the +5 V DC supply
voltage at VA+ and VD+ pins. The “+” and “-” input pins of both input channels are shorted to AGND. Then the CS5550 is commanded to continuous
conversion acquisition mode, and digital output data is collected for the channel under test. The (zero-to-peak) value of the digital sinusoidal output
signal is determined, and this value is converted into the (zero-to-peak) value of the sinusoidal voltage (measured in mV) that would need to be
applied at the channel’s inputs, in order to cause the same digital sinusoidal output. This voltage is then defined as Veq. PSRR is then (in dB):
VOLTAGE REFERENCE
Notes: 6. The voltage at VREFOUT is measured across the temperature range. From these measurements the
following formula is used to calculate the VREFOUT Temperature Coefficient:.
Parameter
Symbol
Min
Typ
Max
Unit
Dynamic Characteristics
High Rate Filter Output Word Rate
OWR
-
DCLK/1024
-
Hz
Input Sampling Rate
DCLK = MCLK/K
-
DCLK/8
-
Hz
Full Scale Calibration Range
(Note 3)
FSCR
25
-
100
%F.S.
High Pass Filter Pole Frequency
-3 dB
-
0.5
-
Hz
Power Supplies
Power Supply Currents (Active State)
IA+
ID+ (VD+ = 5 V)
ID+ (VD+ = 3.3 V)
PSCA
PSCD
-
1.3
2.9
1.7
-
mA
Power Consumption
Active State (VD+ = 5 V)
(Note 4)
Active State (VD+ = 3.3 V)
Stand-by State
Sleep State
PC
-
21
11.6
6.75
10
30
-
mW
W
Power Supply Rejection Ratio (AIN1
±)
(Gain = 10)
(50, 60 Hz)(Note 5)
(Gain = 50)
PSRR1
56
70
-
dB
Power Supply Rejection Ratio (AIN2
±)
(Gain = 50)
(50, 60 Hz)(Note 5)
PSRR2
-55-
dB
Parameter
Symbol
Min
Typ
Max
Unit
Reference Output
Output Voltage
REFOUT
2.4
-
2.6
V
Temperature Coefficient
(Note 6)
TC
-
25
60
ppm/°C
Load Regulation
(Output Current 1 A Source or Sink)
VR
-6
10
mV
Reference Input
Input Voltage Range
VREFIN
2.4
2.5
2.6
V
Input Capacitance
-
4
-
pF
Input CVF Current
-
25
-
nA
PSRR
20
150
V
eq
---------
log
=
(VREFOUTMAX - VREFOUTMIN)
VREFOUTAVG
(
1
T
A
MAX
- T
A
MIN
(
1.0 x 10
(
6
TC
VREF =
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS5-56 | 制造商:SUPERWORLD 制造商全稱:Superworld Electronics 功能描述:POWER TRANSFORMER |
| CS5560 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:【2.5 V / 5 V, 50 kSps, 24-bit, High-throughput ツヒ ADC |
| CS5560_08 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:±2.5 V / 5 V, 50 kSps, 24-bit, High-throughput ΔΣ ADC |
| CS5560_09 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:±2.5 V / 5 V, 50 kSps, 24-bit, High-throughput ΔΣ ADC |
| CS5560-ISZ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24-Bit 50 kSps ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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