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參數(shù)資料
| 型號(hào)： | CS5534-ASZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁(yè)數(shù)： | 9/43頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT 4CH W/LNA 24-SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 3.84k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 45mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類(lèi)型： | 4 個(gè)差分，單極；4 個(gè)差分，雙極 |
| 配用： | 598-1016-ND - EVAL BOARD FOR CS5534 |
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CS5531/32/33/34-AS
DS289F5
17
2.2.2. Command Register Quick Reference
D7(MSB)
D6
D5
D4
D3
D2
D1
D0
0
ARA
CS1
CS0
R/W
RSB2
RSB1
RSB0
BIT
NAME
VALUE FUNCTION
D7
Command Bit, C
0
1
Must be logic 0 for these commands.
These commands are invalid if this bit is logic 1.
D6
Access Registers as
Arrays, ARA
0
1
Ignore this function.
Access the respective registers, offset, gain, or channel-setup, as an array of regis-
ters. The particular registers accessed are determined by the RS bits. The registers
are accessed MSB first with physical channel 0 accessed first followed by physical
channel 1 next and so forth.
D5-D4
Channel Select Bits,
CS1-CS0
00
01
10
11
CS1-CS0 provide the address of one of the two (four for CS5533/34) physical input
channels. These bits are also used to access the calibration registers associated
with the respective physical input channel. Note that these bits are ignored when
reading data register.
D3
Read/Write, R/W
0
1
Write to selected register.
Read from selected register.
D2-D0
Register Select Bit,
RSB3-RSB0
000
001
010
011
101
110
111
Reserved
Offset Register
Gain Register
Configuration Register
Channel-Setup Registers
Reserved
D7(MSB)
D6
D5
D4
D3
D2
D1
D0
1
MC
CSRP2
CSRP1
CSRP0
CC2
CC1
CC0
BIT
NAME
VALUE FUNCTION
D7
Command Bit, C
0
1
These commands are invalid if this bit is logic 0.
Must be logic 1 for these commands.
D6
Multiple Conver-
sions, MC
0
1
Perform fully settled single conversions.
Perform conversions continuously.
D5-D3
Channel-Setup Reg-
ister Pointer Bits,
CSRP
000
...
111
These bits are used as pointers to the Channel-Setup registers. Either a single con-
version or continuous conversions are performed on the channel setup register
pointed to by these bits.
D2-D0
Conversion/Calibra-
tion Bits, CC2-CC0
000
001
010
011
100
101
110
111
Normal Conversion
Self-Offset Calibration
Self-Gain Calibration
Reserved
System-Offset Calibration
System-Gain Calibration
Reserved
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| CS5534-BS | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5534-BSR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 24-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5534-BSZ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5534-BSZ/H | 制造商:Cirrus Logic 功能描述: |
| CS5534-BSZR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 24-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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