參數(shù)資料
型號： CS5531-ASZ
廠商： Cirrus Logic Inc
文件頁數(shù)： 20/43頁
文件大?。?/td> 0K
描述： IC ADC 16BIT 2CH W/LNA 20SSOP
標準包裝： 66
位數(shù)： 16
采樣率（每秒）： 3.84k
數(shù)據(jù)接口： 串行
轉換器數(shù)目： 1
功率耗散（最大）： 45mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
供應商設備封裝： 20-SSOP
包裝： 管件
輸入數(shù)目和類型： 2 個差分，單極；2 個差分，雙極
產(chǎn)品目錄頁面： 755 (CN2011-ZH PDF)
其它名稱： 598-1111-5
CS5531/32/33/34-AS
DS289F5
27
Filter Rate Select, FRS[19]
0
Use the default output word rates.
1
Scale all output word rates and their corresponding filter characteristics by a factor of 5/6.
NU (Not Used)[18:0]
0
Must always be logic 0. Reserved for future upgrades.
2.4. Setting up the CSRs for a Measurement
The CS5531/32/33/34 have four channel-setup reg-
isters (CSRs). Each CSR contains two 16-bit Setups
which are programmed by the user to contain data
conversion information such as: 1) which physical
channel will be converted, 2) at what gain will the
channel be converted, 3) at what word rate will the
channel be converted, 4) will the output conversion
be unipolar or bipolar, 5) what will be the state of the
output latch during the conversion, 6) will the con-
verter delay the start of a conversion to allow time
for the output latch to settle before the conversion is
begun, and 7) will the open circuit detect current
source be activated for that Setup. In addition, when
the OGS bit in the Configuration Register is set, the
Setup selects which set of offset and gain registers to
use when performing conversions or calibrations.
Note that a particular physical input channel can be
represented in more than one Setup with different
output rates, gain ranges, etc. (i.e. each Setup is in-
dependently defined). Refer to section 2.4.1 for
more details about the Channel Setup Registers.
Each 32-bit CSR is individually accessible and
contains two 16-bit Setups. As an example, to con-
figure Setup 1 in the CS5531/32/33/34 with the
write individual channel-setup register command
(0x05 hexadecimal), bits 31 to 16 of CSR 1 con-
tains the information for Setup 1 and bits 15 to 0
contain the information for Setup 2. Note that while
reading/writing CSRs, two Setups are accessed in
pairs as a single 32-bit CSR register. Even if one of
the Setups isn’t used, it must be written to or read.
Examples detailing the power of the CSRs are pro-
vided in section 2.6.3.
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參數(shù)描述
CS5531-ASZR 功能描述:模數(shù)轉換器 - ADC IC 16-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5532 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
CS5532-AS 功能描述:模數(shù)轉換器 - ADC 2-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5532-ASR 功能描述:模數(shù)轉換器 - ADC IC 16-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5532-ASZ 功能描述:模數(shù)轉換器 - ADC 2-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
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