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參數(shù)資料
| 型號： | CS5376A-IQZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 18/49頁 |
| 文件大小： | 0K |
| 描述： | IC FILTER DGTL MULTI-CH 64-TQFP |
| 標準包裝： | 1,000 |
| 濾波器類型： | 數(shù)字 |
| 濾波器數(shù)： | 4 |
| 濾波器階數(shù)： | 2nd |
| 電源電壓： | 3 V ~ 5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設(shè)備封裝： | 64-TQFP（10x10） |
| 包裝： | 帶卷 (TR) |
| 配用： | 598-1778-ND - EVALUATION BOARD FOR CS5376 |
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2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FUSB2805 Rev. 1.0.3
25
F
USB2
8
0
5
—
USB2
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High
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UL
P
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Inter
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USB High-Speed Detection Handshake (Chirp)
The sequence for detection includes the USB reset and
the HS detection handshake (
“chirp”) and includes the
following sequence of events:
1.
USB Reset - The host detects the peripheral
attachment (LS if DM is HIGH; FS if DP is HIGH). If
LS is detected, the host does not continue with the
following sequence of events. If a FS peripheral is
detected, it resets the peripheral by writing to
FUNC_CTRL and setting XCVRSELECT[1:0]=00b
(high speed) and TERMSELECT=0b that drives a
SE0 on the bus (DP and DM connected to GND
through
45
Ω).
The
host
also
sets
OPMODE[1:0]=10b for correct chirp transmit and
receive. The start of SE0 is defined as T0 time. The
peripheral FUSB2805 asserts DIR and informs the
link of the LINESTATE change using an RXCMD.
Note:
16. The host must also take into account, when
receiving chirp signaling, the high-speed
differential receiver output so as not to see
false bus activity.
2.
Peripheral Chirp Response - After detecting the
SE0 for no less than 2.5 s; if HS capable, the
peripheral
sets
XCVRSELECT[1:0]=10b
and
OPMODE[1:0]=10b, then sends immediately after a
TXCMD
(NOPID)
command.
This
means
a
transmission of a chirp-K for no less than 1ms and
ending no more than 7 ms after the reset time, T0.
If the peripheral is in low-power mode, it must wake
up the clock within 5.6 ms, leaving 200 s for the
link to start transmitting the chirp-K and 1.2 ms for
the chirp-K to complete (based on worst-case 10%
slow clock).
3.
Host Chirp Response
– If the host does not detect
the peripheral chirp, it must continue asserting SE0
until the end of reset. If the peripheral chirp
response is detected by the host for a period no
less than 2.5 s, then no more than 100 s after
the
bus
leaves
chirp-K,
the
host
sends
a
TXCMD(NOPID) with an alternating sequence of
chirp-Ks and chirp-Js. Each chirp-K or chirp-J must
last no less than 40 s and no longer than 60 s.
4.
High-Speed Idle Response
– The peripheral must
detect a minimum of chirp K-J-K-J-K-J, with each
chirp detection being for at least 2.5 s. The
peripheral
sets
TERMSELECT=0b
and
OPMODE[1:0]=00b after seeing the minimum chirp
sequence. The peripheral is in high-speed mode
and detects the !squelch (LINESTATE=01b). When
the peripheral detects squelch (LINESTATE=10b),
it recognizes that the host has completed chirp and
waits for HS USB traffic to begin. After transmitting
the
chirp
sequence,
the
host
changes
OPMODE[1:0]=00b and begins sending packets.
Figure 14 shows the USB reset and HS chirp sequence.
Refer to ULPI Rev. 1.1 specification, section 3.8.5.1 for
details on HS detection timing.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS5376-BQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CS5378 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-power Single-channel Decimation Filter |
| CS5378_08 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-power Single-channel Decimation Filter |
| CS5378-IS | 功能描述:特殊用途放大器 IC LP Single-Ch Decimation Filter RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| CS5378-ISZ | 功能描述:特殊用途放大器 IC LP Single-Ch Decimation Filter RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
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