參數(shù)資料
型號: CS52845EDR14
廠商: ZF Electronics Corporation
英文描述: Current Mode PWM Control Circuit with 50% Max Duty Cycle
中文描述: 電流模式PWM控制電路的最大占空比為50%
文件頁數(shù): 2/6頁
文件大?。?/td> 142K
代理商: CS52845EDR14
2
Electrical Characteristics: -40
T
A
85
C; V
CC
= 15V (Note 1); R
T
= 10k
; C
T
= 3.3nF for sawtooth mode.unless otherwise stated.
C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
T
J
=25
C, I
REF
=1mA
12
V
CC
25V
1
I
REF
20mA
(Note 2)
Line, Load, Temp. (Note 2)
10Hz
f
10kHz, T
J
=25
C (Note 2)
T
A
=125
C, 1000 Hrs. (Note 2)
T
A
=25
C
4.95
5.00
6
6
0.2
5.05
20
25
0.4
5.10
V
mV
mV
mV/
C
V
μV
mV
mA
4.90
50
5
-100
25
-180
-30
I
Oscillator Section
Initial Accuracy
Voltage Stability
Temperature Stability
Sawtooth Mode, T
J
=25
C
12
V
CC
25V
Sawtooth Mode T
MIN
T
A
T
MAX
(Note 2)
V
OSC
(peak to peak)
47
52
0.2
57
1.0
kHz
%
5
%
V
Amplitude
1.7
I
Error Amp Section
Input Voltage
Input Bias Current
A
VOL
Unity Gain Bandwidth
PSRR
Output Sink Current
Output Source Current
V
OUT
HIGH
V
OUT
LOW
V
COMP
=2.5V
V
FB
=0V
2
V
OUT
4V
(Note 2)
12
V
CC
25V
V
FB
=2.7V, V
COMP
=1.1V
V
FB
=2.3V, V
COMP
=5V
V
FB
=2.3V, R
L
=15k
to Gnd
V
FB
=2.7V, R
L
=15k
to V
REF
2.45
2.50
-0.3
90
1.0
70
6
-0.8
6
0.7
2.55
-1.0
V
μA
dB
MHz
dB
mA
mA
V
V
65
0.7
60
2
-0.5
5
1.1
I
Current Sense Section
Gain
Maximum Input Signal
PSRR
Input Bias Current
Delay to Output
(Notes 3 & 4)
V
COMP
=5V (Note 3)
12
V
CC
25V (Note 3)
V
Sense
=0V
T
J
=25
C (Note 2)
2.85
0.9
3.00
1.0
70
-2
150
3.15
1.1
V/V
V
dB
μA
ns
-10
300
I
Output Section
Output Low Level
I
SINK
=200mA
Output High Level
I
SINK
=20mA
0.1
1.5
13.5
13.5
50
50
0.4
2.2
V
V
V
V
ns
ns
I
SOURCE
=20mA
I
SOURCE
=200mA
T
J
=25
C, C
L
=1nF (Note 2)
T
J
=25
C, C
L
=1nF (Note 2)
13.0
12.0
Rise Time
Fall Time
150
150
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