參數(shù)資料
型號: CS4392-KZZ
廠商: Cirrus Logic Inc
文件頁數(shù): 5/40頁
文件大?。?/td> 0K
描述: IC DAC 24BIT 192KHZ W/VC 20TSSOP
標準包裝: 74
位數(shù): 24
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 150mW
工作溫度: -10°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 20-TSSOP
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極
采樣率(每秒): 200k
產(chǎn)品目錄頁面: 757 (CN2011-ZH PDF)
配用: CDB4392-ND - EVALUATION BOARD FOR CS4392
其它名稱: 598-1065-5
CS4392
DS459PP3
13
3.9
Using DSD mode
In stand-alone mode, DSD operation is selected by holding DSD_EN(LRCK) high and applying the DSD
data and clocks to the appropriate pins. The M2:0 pins set the expected DSD rate and MCLK ratio.
In control-port mode the FM bits set the device into DSD mode (DSD_EN pin is not required to be held
high). The DIF register then controls the expected DSD rate and MCLK ratio.
3.10 Mute Control
The Mute Control pins go high during power-up initialization, reset, or if the Master Clock to Left Right
Clock ratio is incorrect. These pins will also go high following the reception of 8192 consecutive audio
samples of static 0 or -1 on both the left and right channels. A single sample of non-zero data on either
channel will cause the Mute Control pins to go low. These pins are intended to be used as control for an
external mute circuit in order to add off-chip mute capability.
Use of the Mute Control function is not mandatory but recommended for designs requiring the absolute
minimum in extraneous clicks and pops. Also, use of the Mute Control function can enable the system de-
signer to achieve idle channel noise/signal-to-noise ratios which are only limited by the external mute cir-
cuit. See the CDB4392 data sheet for a suggested mute circuit.
DSD_Mode
M2
M1
M0
DESCRIPTION
1
000
64x oversampled DSD data with a 4x MCLK to DSD data rate
1
001
64x oversampled DSD data with a 6x MCLK to DSD data rate
1
010
64x oversampled DSD data with a 8x MCLK to DSD data rate
1
011
64x oversampled DSD data with a 12x MCLK to DSD data rate
1
100
128x oversampled DSD data with a 2x MCLK to DSD data rate
1
101
128x oversampled DSD data with a 3x MCLK to DSD data rate
1
110
128x oversampled DSD data with a 4x MCLK to DSD data rate
1
111
128x oversampled DSD data with a 6x MCLK to DSD data rate
Table 7. Direct Stream Digital (DSD), Stand-Alone Mode Options
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