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參數(shù)資料
| 型號(hào)： | CS42L55-DNZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁(yè)數(shù)： | 52/68頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CODEC STER H-HDPN AMP 36-QFN |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 類型： | 立體聲音頻 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 1 / 1 |
| 三角積分調(diào)變： | 是 |
| 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 95 / 99 |
| 電壓 - 電源，模擬： | 1.65 V ~ 2.71 V |
| 電壓 - 電源，數(shù)字： | 1.65 V ~ 2.71 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-QFN |
| 供應(yīng)商設(shè)備封裝： | 36-QFN-EP（5x5） |
| 包裝： | 管件 |
| 配用： | 598-1506-ND - BOARD EVAL FOR CS42L55 CODEC |
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MIC3000
Micrel
M9999-101204
56
October 2004
Fault Suppression Timer (FLTTMR)
Fault suppression interval in increments of 0.5ms
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
10 = 0Ah
Saturation faults are suppressed for a time, tFLTTMR, following laser turn-on. This avoids nuisance tripping while the
APC loop starts up. The length of this interval is (FLTTMR
∞0.5ms), typical. A value of zero will result in no fault sup-
pression. A valid OEM password is required for access to this register. This register is non-volatile and will be main-
tained through power and reset cycles.
Fault Mask (FLTMSK)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
OEMIM
POHE
SATMSK
TXMSK
IAMSK
DFMSK
read/write
reserved
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
11 = 0Bh
A valid OEM password is required for access to this register. This register is non-volatile and will be maintained
through power and reset cycles.
Bit
Function
Operation
D[7]
OEMIM
OEM interrupt mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
D[6]
POHE
OEM Power-on Hour Meter enable bit
1 = enabled; 0 = disabled; Read/write; non-volatile.
D[5:4]
Reserved
Always write as zero; reads undefined.
D[3]
SATMSK
APC saturation fault mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
D[2]
TXMSK
High TX optical power fault mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
D[1]
IAMSK
Bias current high alarm mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
D[0]
DFMSK
Diode fault mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
OEM Password Setting (OEMPWSET)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
12 - 15 = 0Fh - 0Fh; 0Ch = MSB
This four-byte field is the password required for access to the OEM area of the MIC3000’s memory and registers. The
byte at address 250 (FAh) is the most significant byte. This field is compared to the four-byte OEMPW field at serial
address A2h, byte 120 to 123. If the two fields match, access is allowed to the OEM areas of the MIC3000 non-volatile
memory at serial addresses A4h and A6h. The OEM password may be set by writing the new value into OEMPWSET.
The new password will not take effect until after a power-on reset occurs or a warm reset is performed using the RST
bit in OEMCFG0. This allows the new password to be verified before it takes effect. These registers are non-volatile
and will be maintained through power and reset cycles. A valid OEM password is required for access to this register.
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