參數(shù)資料
型號: CS42L51-CNZ
廠商: Cirrus Logic Inc
文件頁數(shù): 1/43頁
文件大?。?/td> 0K
描述: IC CODEC STEREO W/HDPN AMP 32QFN
標(biāo)準(zhǔn)包裝: 60
類型: 立體聲音頻
數(shù)據(jù)接口: PCM 音頻接口
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 98 / 98
電壓 - 電源,模擬: 1.8V,2.5V
電壓 - 電源,數(shù)字: 1.8V,2.5V
工作溫度: -10°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-QFP
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 管件
產(chǎn)品目錄頁面: 754 (CN2011-ZH PDF)
配用: 598-1005-ND - BOARD EVAL FOR CS42L51 CODEC
其它名稱: 598-1045
Copyright
Cirrus Logic, Inc. 2006
(All Rights Reserved)
JULY '06
DS679F1
Low Power, Stereo CODEC with Headphone Amp
DIGITAL to ANALOG FEATURES
98 dB Dynamic Range (A-wtd)
-86 dB THD+N
Headphone Amplifier - GND Centered
On-Chip Charge Pump Provides -VA_HP
No DC-Blocking Capacitor Required
46 mW Power Into Stereo 16
@ 1.8 V
88 mW Power Into Stereo 16
@ 2.5 V
-75 dB THD+N
Digital Signal Processing Engine
Bass & Treble Tone Control, De-Emphasis
PCM + ADC Mix w/Independent Vol Control
Master Digital Volume Control
Soft Ramp & Zero Cross Transitions
Beep Generator
Tone Selections Across Two Octaves
Separate Volume Control
Programmable On & Off Time Intervals
Continuous, Periodic or One-Shot Beep
Selections
Programmable Peak-Detect and Limiter
Pop and Click Suppression
ANALOG to DIGITAL FEATURES
98 dB Dynamic Range (A-wtd)
-88 dB THD+N
Analog Gain Controls
+32 dB or +16 dB MIC Pre-Amplifiers
Analog Programmable Gain Amplifier
(PGA)
+20 dB Digital Boost
Programmable Automatic Level Control (ALC)
Noise Gate for Noise Suppression
Programmable Threshold and
Attack/Release Rates
Independent Channel Control
Digital Volume Control
High-Pass Filter Disable for DC Measurements
Stereo 3:1 Analog Input MUX
Dual MIC Inputs
Programmable, Low Noise MIC Bias Levels
Differential MIC Mix for Common Mode
Noise Rejection
Very Low 64 Fs Oversampling Clock Reduces
Power Consumption
1.8 V to 3.3 V
Multibit
Σ Modulator
Charge
Pump
Left HP Out
Right HP Out
Multibit
Oversampling
ADC
Multibit
Oversampling
ADC
Serial Audio
Input
Serial Audio
Output
1.8 V to 2.5 V
MUX
PGA
P
C
M
Se
rial
Int
e
rfa
c
e
Register
Configuration
Le
v
e
lTr
a
n
slat
or
Reset
Hardware
Mode or I
2C &
SPI Software
Mode
Control Data
Stereo Input 1
Stereo Input 2
Stereo Input 3 /
Mic Input 1 & 2
PGA
+32 dB
Volume
Controls
Beep
Generator
MUX
Headphone
Amp - GND
Centered
Headphone
Amp - GND
Centered
ALC
MIC
Bias
1.8 V to 2.5 V
MUX
Switched
Capacitor DAC
and Filter
Switched
Capacitor DAC
and Filter
High Pass
Filters
ALC
Digital
Signal
Processing
Engine
CS42L51
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