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參數(shù)資料
| 型號： | CP2104-F03-GM |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 21/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SGL USB-TO-UART BRIDGE 24QFN |
| 產(chǎn)品培訓(xùn)模塊： | CP21xx USB Bridge |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 應(yīng)用： | UART 至 USB 電橋 |
| 接口： | UART，USB |
| 電源電壓： | 1.8V，3 V ~ 3.6 V |
| 封裝/外殼： | 24-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN（4x4） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
| 配用： | 336-2007-ND - KIT EVAL FOR CP2104 |
| 其它名稱： | 336-2008-5 |
CP2104
8
Rev. 1.1
3. Pinout and Package Definitions
Table 7. CP2104 Pin Definitions
Name
Pin #
Type
Description
VDD
6
Power In
Power Out
Power Supply Voltage Input.
Voltage Regulator Output. See Section 9.
VIO
5
Power In
I/O Supply Voltage Input.
GND
2
Ground. Must be tied to ground.
RST
9D I/O
Device Reset. Open-drain output of internal POR or VDD monitor. An
external source can initiate a system reset by driving this pin low for
the time specified in Table 4.
REGIN
7
Power In
5 V Regulator Input. This pin is the input to the on-chip voltage regu-
lator.
VBUS
8
D In
VBUS Sense Input. This pin should be connected to the VBUS signal
of a USB network.
VPP
16*
Special
Connect a 4.7 F capacitor between this pin and ground to support
ROM programming via USB interface.
D+
3
D I/O
USB D+
D–
4
D I/O
USB D–
TXD
21
D Out
Asynchronous data output (UART Transmit)
RXD
20
D In
Asynchronous data input (UART Receive)
CTS
18*
D In
Clear to Send control input (active low)
RTS
19*
D Out
Ready to Send control output (active low)
DSR
22*
D In
Data Set Ready control input (active low)
DTR
23*
D Out
Data Terminal Ready control output (active low)
DCD
24*
D In
Data Carrier Detect control input (active low)
RI
1*
D In
Ring Indicator control input (active low)
SUSPEND
17*
D Out
This pin is logic high when the CP2104 is in the USB Suspend state.
SUSPEND
15*
D Out
This pin is logic low when the CP2104 is in the USB Suspend state.
GPIO.3
11*
D I/O
User-configurable input or output.
GPIO.2
12*
D I/O
User-configurable input or output.
GPIO.1
13*
D I/O
User-configurable input or output.
GPIO.0
14*
D I/O
User-configurable input or output.
NC
10*
This pin should be left unconnected or tied to VIO.
*Note: Pins can be left unconnected when not used.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CP2104-F03-GMR | 功能描述:輸入/輸出控制器接口集成電路 USB to UART bridge RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| CP2104-MINIEK | 制造商:Silicon Laboratories Inc 功能描述:KIT EVAL FOR CP2104-MINI |
| CP2104SX0810GM | 制造商:Silicon Laboratories Inc 功能描述: |
| CP2104SX0810GMR | 制造商:Silicon Laboratories Inc 功能描述: |
| CP2105 | 制造商:SILABS 制造商全稱:SILABS 功能描述:USB DRIVER CUSTOMIZATION |
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