參數(shù)資料
型號(hào)： COP8CDR9KMT8
廠商： National Semiconductor
文件頁(yè)數(shù)： 45/111頁(yè)
文件大?。?/td> 0K
描述： IC MCU EEPROM 8BIT 32K 56-TSSOP
標(biāo)準(zhǔn)包裝： 34
系列： COP8™ 8C
核心處理器： COP8
芯體尺寸： 8-位
速度： 20MHz
連通性： Microwire/Plus（SPI），UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 49
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
包裝： 管件
其它名稱： *COP8CDR9KMT8
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
5.10.7 MICROWIRE/PLUS ISP
TI Semiconductor provides a program, which is available from our web site at www.ti.com, that is capable
of programming a device from the parallel port of a PC. The software accepts manually input commands
and is capable of downloading standard Intel HEX Format files.
Users who wish to write their own MICROWIRE/PLUS ISP host software should refer to the COP8 FLASH
ISP User Manual, available from the same web site. This document includes details of command format
and delays necessary between command bytes.
The MICROWIRE/PLUS ISP supports the following features and commands:
Write a value to the ISP Write Timing Register. NOTE: This must be the first command after entering
MICROWIRE/PLUS ISP mode.
Erase the entire flash program memory (mass erase).
Erase a page at a specified address.
Read Option register.
Read a byte from a specified address.
Write a byte to a specified address.
Read multiple bytes starting at a specified address.
Write multiple bytes starting at a specified address.
Exit ISP and return execution to flash program memory.
The following table lists the MICROWIRE/PLUS ISP commands and provides information on required
parameters and return values.
Table 5-9. MICROWIRE/PLUS ISP Commands
Command
Function
Parameters
Return Data
Value (Hex)
PGMTIM_SET
Write Pulse Timing
0x3B
Value
N/A
Register
PAGE_ERASE
Page Erase
0xB3
Starting Address of Page
N/A
MASS_ERASE
Mass Erase
0xBF
Confirmation Code
N/A (The entire Flash
Memory will be erased)
READ_BYTE
Read Byte
0x1D
Address High, Address
Data Byte if Security not
Low
set. 0xFF if Security set.
Option Register if address
= 0xFFFF, regardless of
Security
BLOCKR
Block Read
0xA3
Address High, Address
n Data Bytes if Security
Low, Byte Count (n) High,
not set.
Byte Count (n) Low
n Bytes of 0xFF if Security
0
≤ n ≤ 32767
set.
WRITE_BYTE
Write Byte
0x71
Address High, Address
N/A
Low, Data Byte
BLOCKW
Block Write
0x8F
Address High, Address
N/A
Low, Byte Count (0
≤ n ≤
16), n Data Bytes
EXIT
EXIT
0xD3
N/A
N/A (Device will Reset)
INVALID
N/A
Any other invalid
N/A
command will be ignored
5.10.8 USER ISP AND VIRTUAL E
2
The following commands will support transferring blocks of data from RAM to flash program memory, and
vice-versa. The user is expected to enforce application security in this case.
Erase the entire flash program memory (mass erase). NOTE: Execution of this command will force the
device into the MICROWIRE/PLUS ISP mode.
Copyright 2000–2013, Texas Instruments Incorporated
Functional Description
39
Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9
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