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參數(shù)資料
| 型號： | CMP04FSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMPARATOR QUAD LP 14SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 通用 |
| 元件數(shù)： | 4 |
| 輸出類型： | CMOS，DTL，ECL，MOS，開路集電極，TTL |
| 電壓 - 電源，單路/雙路(±)： | 3.3 V ~ 36 V，±1.65 V ~ 18 V |
| 電壓 - 輸入偏移（最小值）： | 1mV @ 5V |
| 電流 - 輸入偏壓（最小值）： | 0.1µA @ 5V |
| 電流 - 輸出（標(biāo)準(zhǔn)）： | 16mA @ 5V |
| 電流 - 靜態(tài)（最大值）： | 3mA |
| CMRR, PSRR（標(biāo)準(zhǔn)）： | 100dB CMRR，100dB PSRR |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 帶卷 (TR) |
REV. D
a
CMP04
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
2003 Analog Devices, Inc. All rights reserved.
Quad Low Power,
Precision Comparator
FEATURES
High Gain: 200 V/mV Typ
Single- or Dual-Supply Operation
Input Voltage Range Includes Ground
Low Power Consumption (1.5 mW/Comparator)
Low Input Bias Current: 100 nA Max
Low Input Offset Current: 10 nA Max
Low Offset Voltage: 1 mV Max
Low Output Saturation Voltage: 250 mV @ 4 mA
Logic Output Compatible with TTL, DTL, ECL, MOS,
and CMOS
Directly Replaces LM139/LM239/LM339 Comparators
GENERAL DESCRIPTION
Four precision independent comparators comprise the CMP04.
Performance highlights include a very low offset voltage, low
output saturation voltage, and high gain in a single-supply
design. The input voltage range includes ground for single-
supply operation and V– for split supplies. A low power
supply current of 2 mA, which is independent of supply voltage,
makes this the preferred comparator for precision applications
requiring minimal power consumption. Maximum logic inter-
face flexibility is offered by the open-collector TTL output.
Q3
Q2
100 A
3.5 A
100 A
Q8
+INPUT
*
OUTPUT
Q4
Q7
*
–INPUT
Q6
Q5
Q1
V+
*SUBSTRATE DIODES
Figure 1. Simplified Schematic (1/4 CMP04)
PIN CONNECTIONS
14-Lead SOIC
14
13
12
11
10
9
8
1
2
3
4
5
6
7
CMP04
1
4
3
2
OUT 2
OUT 3
OUT 1
V+
IN 1–
IN 1+
IN 2–
IN 2+
OUT 4
GND
IN 4+
IN 4–
IN 3+
IN 3–
TYPICAL INTERFACE
5.0
1/4
CMP04
3
12
100k
1/4
CD4011
Figure 2a. Driving CMOS
5.0
1/4
CMP04
3
12
10k
1/4 SN7400
Figure 2b. Driving TTL
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