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參數(shù)資料
| 型號： | CLA70000HG44 |
| 英文描述： | ASIC |
| 中文描述： | 專用集成電路 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 243K |
| 代理商： | CLA70000HG44 |
ADT32
32 bit adder
SUBTRACTOR BLOCKS
ADSU4
ADSU8
ADSU16
ADSU24
ADSU32
4 bit subtractor add-on
8 bit subtractor add-on
16 bit subtractor add-on
24 bit subtractor add-on
32 bit subtractor add-on
SHIFTERS ARITHMETIC RIGHT
(PADDED WITH MSB)
SHA4
SHA8
SHA16
SHA24
SHA32
4 stage arithmetic right shifter
8 stage arithmetic right shifter
16 stage arithmetic right shifter
24 stage arithmetic right shifter
31 stage arithmetic right shifter
SHIFTERS BARREL RIGHT
(PADDED WITH LSB DATA EXITING SHIFTER)
SHB4
SHB8
SHB16
SHB24
SHB32
4 stage barrel right shifter
8 stage barrel right shifter
16 stage barrel right shifter
24 stage barrel right shifter
31 stage barrel right shifter
SHIFTERS LOGIC RIGHT/LEFT
(PADDED WITH ZERO'S)
SHL4
SHL8
SHL16
SHL24
SHL32
4 stage logic right shifter
8 stage logic right shifter
16 stage logic right shifter
24 stage logic right shifter
31 stage logic right shifter
LOGIC UNITS (8 FUNCTION)
FGLO4
FGLO8
FGLO16
FGLO24
FGLO32
4 logic bit unit
8 logic bit unit
16 logic bit unit
24 logic bit unit
32 logic bit unit
ARITHMETIC UNITS (8 FUNCTION)
FGAR4
FGAR8
FGAR16
FGAR24
FGAR32
4 bit logic unit
8 bit logic unit
16 bit logic unit
24 bit logic unit
32 bit logic unit
CLA70000 DSP MACROCELL LIBRARY
MULTIPLIERS AND ASSOCIATED CELLS
BMA8X8
BMA16X16
BMA24X24
Mixed mode multiplier (8 x 8 bits)
Mixed mode multiplier (16 x 16 bits)
Mixed mode multiplier (32 x 32 bits)
BMB16X12
Single pipeline multiplier (16 x 12 bits)
BMC24X24
Mixed mode multiplier (24 x 24 bits)
BTHE1
BTHD1
BTHD2
Booth encoder
Non-Inverting Booth decoder
Inverting Booth decoder
Many of the macro functions perform similar functions
to the standard TTL and CMOS logic families. The user is
warned, however, that the logic functions may differ slightly
and is therefore recommended to refer to the design manual
rather than assume an exact functional copy. The PDS
simulator uses the constituent microcell models for circuit
analysis.
The macrocells are constructed from basic
microcells and are placed and routed to give optimum use
of chip area.
MACRO
FUNCTION
ADDERS
ADA4
ADG4
4 bit binary full adders with fast carry
Look ahead carry generator
COUNTERS
CNA4
CNB4
CNC4
CND4
CND4A
CNE4
CNF4
CNG4
BCD counter/4 bit latch decoder/driver
4 bit counter latch
4 bit synchronous counter
4 bit binary up/down Synchronous counter
4 bit binary up/down counter with reset
4 bit decade counter
4 bit binary synchronous counter
4 bit binary counter
DECODERS
DRA3T8
DRA4T16
DRA4T16A
3 line to 8 line decoder/demultiplexer
4 line to 16 line decoder/demultiplexer
4 line to 16 line decoder/demultiplexer
no enable
3 line to 8 line decoder/demultiplexer
with address registers
3 line to 8 line decoder/demultiplexer
with address latches
2 line to line decoder
4 line to 10 line BCD decoder
4 line to 10 line excess 3 to
decimal decoder
4 line to 10 line excess gray to
decimal decoder decoder
BCD to decimal decoder/driver
BCD to 7 segment decoder/driver
BCD to 7 segment decoder/driver
DRB3T8
DRB3T8
DRD2T4
DRF4T10
DRG4T10
DRH4T10
DRI10
DRJ7
DRK7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLA70000HP28 | ASIC |
| CLA70000HP44 | ASIC |
| CLA70000LC28 | ASIC |
| CLA70000LC44 | ASIC |
| CLA70000MC16 | ASIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLA70000HP28 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| CLA70000HP44 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| CLA70000LC28 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| CLA70000LC44 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| CLA70000MC16 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
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