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參數(shù)資料
| 型號： | CLA70000GP44 |
| 英文描述： | ASIC |
| 中文描述： | 專用集成電路 |
| 文件頁數(shù)： | 10/17頁 |
| 文件大?。?/td> | 243K |
| 代理商： | CLA70000GP44 |
DESIGN SUPPORT AND INTERFACES
I
Flexible design route approach
I
Design center engineer assigned to every customer
circuit
I
Full turnkey service capability
Design and layout support for CLA70000 arrays is
available from various centers worldwide each of which is
connected to our Headquarters via high speed data links. A
design center engineer is assigned to each customer’s circuit,
to ensure good communication , and a smooth and efficient
design flow. It should be noted that sign-off simulation against
the GPS 'golden' simulator is also supported at our local
design centers.
GPS offers a variety of formal design routes as illustrated
in the table below. Differing interface methods allow for
varying levels of involvement in a manner which complements
individual customer design styles, whilst maintaining our
responsibility to ensure first time working devices.
As part of the design process GPS operates a thorough
design audit procedure to verify compliance with customer
specification and to ensure manufacturability. The procedure
includes four separate review meetings, with the customer,
held at key stages of the design.
Review 1:
Held at the beginning of the design cycle
CAD SUPPORT
Design Routes
To check and agree on all performance,
packaging, specifications and design
timescales.
Review 2:
Held after Logic Simulation but prior to
Layout
Checks to ensure satisfactory functionality,
timing performance, and adequate fault
coverage.
Review 3:
Held after Layout and Post Layout Simulation
Verification of satisfactory design performance
after insertion of actual track loads. Final check
of all device specifications before prototype
manufacture.
Review 4:
Held after Prototype Delivery
Confirm that devices meet all specifications
and are suitable for full scale production.
DESIGN TOOLS
The focus of the GEC Plessey design tool methodology is
that of maintaining an open CAD system with all interfaces
standardized via EDIF 2.0 . This enables us to provide full
support for a variety of 3rd party ASIC design tools and
facilitates rapid updating of associated libraries. It also
provides an interface to the GEC Plessey (PDS2) design
system, which offers a total design environment including
behavioral and functional level modelling.
THIRD PARTY
SOFTWARE
PDS IN-HOUSE
SOFTWARE
TURNKEY
SERVICE
OPTIONS
Design Review 1
Schematic Capture
CUSTOMER
CUSTOMER
GPS
Logical Design
CUSTOMER
CUSTOMER
GPS
Design Review 2
Physical Design
GPS
CUSTOMER or GPS
GPS
Design Review 3
Prototype
Manufacturing
GPS
GPS
GPS
Prototype Evaluation
CUSTOMER
CUSTOMER
CUSTOMER
Design Review 4
Production
GPS
GPS
GPS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLA70000HC28 | ASIC |
| CLA70000HC44 | ASIC |
| CLA70000HG28 | ASIC |
| CLA70000HG44 | ASIC |
| CLA70000HP28 | ASIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLA70000HC28 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| CLA70000HC44 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| CLA70000HG28 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| CLA70000HG44 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| CLA70000HP28 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
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