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參數資料
| 型號： | CL7128AEFC100-6 |
| 英文描述： | Electrically-Erasable Complex PLD |
| 中文描述： | 電可擦除復雜可編程邏輯器件 |
| 文件頁數： | 6/14頁 |
| 文件大?。?/td> | 107K |
| 代理商： | CL7128AEFC100-6 |
CL7128A and CL7128AE Laser Processed Logic Devices
Page 68
Absolute Maximum R atings
DC Electrical Specifications
Symbol
Parameter
Conditions
Min
Max
Unit
V
CC
Supply voltage
With respect to ground
-0.5
4.6
V
V
I
DC input voltage
[1]
With respect to ground
-2.0
5.8
V
I
OUT
DC output current, per pin
-25
25
mA
T
STG
Storage temperature
No bias
-65
150
°C
T
A
Ambient temperature
Under bias
-65
135
°C
T
J
Junction temperature
Fineline BGA, PQFP,
and TPFP packages,
Under bias
135
°C
7KA tbl 03
Symbol
V
CCINT
V
CCIO
Parameter
Conditions
Min
3.0
Max
3.6
Unit
V
Supply voltage, internal logic and input buffers
Supply voltage for output drivers
3.3 volt operation
2.5 volt operation
Input voltage
Output voltage
Ambient Operating temperature
Commercial temperature range
Industrial temperature range
Ambient Operating temperature
Commercial temperature range
Industrial temperature range
Input signal rise time
Input signal fall time
V
CC
rise time
3.0
2.3
-0.5
0
3.6
2.7
5.75
V
CCIO
V
V
V
V
V
I
V
O
0
70
85
°C
°C
-40
0
90
105
40
40
100
7KA tbl 02
°C
°C
ns
ns
ms
-40
t
R
t
F
t
RVCC
T
A
T
J
R ecommended Operating Conditions
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