參數(shù)資料
型號(hào): CGS74LCT802V
英文描述: Eight Distributed-Output Clock Driver
中文描述: 八分布式輸出時(shí)鐘驅(qū)動(dòng)器
文件頁數(shù): 2/10頁
文件大?。?/td> 170K
代理商: CGS74LCT802V
Functional Description
On the multiplexed clock device, the SEL pin is used to
determine which CLKn input will have an active effect on
the outputs of the circuit. When SEL
e
1, the CLK1 input is
selected and when SEL
e
0, the CLK0 input is selected.
The non-selected CLKn input will not have any effect on the
logical output level of the circuit. The output pins act as a
single entity and will follow the state of the CLK or
CLK1/CLK0 pins when either the multiplexed (’2526) or the
straight (’2525) clock distribution chip is selected.
Pin Description
Pin Names
Description
CLK
CLK0, CLK1
O
0
–O
7
SEL
Clock Input (’2525)
Clock Inputs (’2526)
Outputs
Clock Select (’2526)
Truth Tables
’2525
Inputs
Outputs
CLK
O
0
–O
7
L
H
L
H
’2526
Inputs
Outputs
CLK0
CLK1
SEL
O
0
–O
7
L
H
X
X
X
X
L
H
L
L
H
H
L
H
L
H
L
e
Low Voltage Level
H
e
High Voltage Level
X
e
Immaterial
’2525
TL/F/10684–7
’2526
TL/F/10684–8
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相關(guān)PDF資料
PDF描述
CGS74C800V Eight Distributed-Output Clock Driver
CGS74C801V Eight Distributed-Output Clock Driver
CGS74C802V Eight Distributed-Output Clock Driver
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